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ASoC: wm8960: Fix WM8960_SYSCLK_PLL mode
With the introduction of WM8960_SYSCLK_AUTO mode, WM8960_SYSCLK_PLL mode was
made unusable. Ensure we're not PLL mode before trying to use MCLK.
Fixes: 3176bf2d7c
("ASoC: wm8960: update pll and clock setting function")
Signed-off-by: Stuart Henderson <stuart.henderson@cirrus.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
95826a3799
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6bb7451429
@ -631,29 +631,31 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec)
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return -EINVAL;
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}
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/* check if the sysclk frequency is available. */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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if (sysclk_divs[i] == -1)
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continue;
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sysclk = freq_out / sysclk_divs[i];
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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if (sysclk == dac_divs[j] * lrclk) {
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if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
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/* check if the sysclk frequency is available. */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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if (sysclk_divs[i] == -1)
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continue;
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sysclk = freq_out / sysclk_divs[i];
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for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
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if (sysclk != dac_divs[j] * lrclk)
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continue;
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for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
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if (sysclk == bclk * bclk_divs[k] / 10)
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break;
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if (k != ARRAY_SIZE(bclk_divs))
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break;
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}
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if (j != ARRAY_SIZE(dac_divs))
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break;
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}
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if (j != ARRAY_SIZE(dac_divs))
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break;
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}
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if (i != ARRAY_SIZE(sysclk_divs)) {
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goto configure_clock;
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} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
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dev_err(codec->dev, "failed to configure clock\n");
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return -EINVAL;
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if (i != ARRAY_SIZE(sysclk_divs)) {
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goto configure_clock;
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} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
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dev_err(codec->dev, "failed to configure clock\n");
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return -EINVAL;
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}
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}
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/* get a available pll out frequency and set pll */
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for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
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