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drm/rockchip: vop: clear DMA stop bit on RK3066

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The RK3066 VOP sets a dma_stop bit when it's done scanning out a frame
and needs the driver to acknowledge that by clearing the bit.

Unless we clear it "between" frames, the RGB output only shows noise
instead of the picture. atomic_flush is the place for it that least
affects other code (doing it on vblank would require converting all
other usages of the reg_lock to spin_(un)lock_irq, which would affect
performance for everyone).

This seems to be a redundant synchronization mechanism that was removed
in later iterations of the VOP hardware block.

Fixes: f4a6de855e ("drm: rockchip: vop: add rk3066 vop definitions")
Cc: stable@vger.kernel.org
Signed-off-by: Val Packett <val@packett.cool>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20240624204054.5524-2-val@packett.cool
This commit is contained in:
Val Packett 2024-06-24 17:40:48 -03:00 committed by Heiko Stuebner
parent ab03974df2
commit 6b44aa559d
3 changed files with 6 additions and 0 deletions
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4
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
View File

@ -1583,6 +1583,10 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc,
VOP_AFBC_SET(vop, enable, s->enable_afbc);
vop_cfg_done(vop);
/* Ack the DMA transfer of the previous frame (RK3066). */
if (VOP_HAS_REG(vop, common, dma_stop))
VOP_REG_SET(vop, common, dma_stop, 0);
spin_unlock(&vop->reg_lock);
/*

1
drivers/gpu/drm/rockchip/rockchip_drm_vop.h
View File

@ -122,6 +122,7 @@ struct vop_common {
struct vop_reg lut_buffer_index;
struct vop_reg gate_en;
struct vop_reg mmu_en;
struct vop_reg dma_stop;
struct vop_reg out_mode;
struct vop_reg standby;
};

1
drivers/gpu/drm/rockchip/rockchip_vop_reg.c
View File

@ -466,6 +466,7 @@ static const struct vop_output rk3066_output = {
};
static const struct vop_common rk3066_common = {
.dma_stop = VOP_REG(RK3066_SYS_CTRL0, 0x1, 0),
.standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),
.out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),
.cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),