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Merge patch series "Add ACPI NUMA support for RISC-V"
Haibo Xu <haibo1.xu@intel.com> says:
This patch series enable RISC-V ACPI NUMA support which was based on
the recently approved ACPI ECR[1].
Patch 1/4 add RISC-V specific acpi_numa.c file to parse NUMA information
from SRAT and SLIT ACPI tables.
Patch 2/4 add the common SRAT RINTC affinity structure handler.
Patch 3/4 change the ACPI_NUMA to a hidden option since it would be selected
by default on all supported platform.
Patch 4/4 replace pr_info with pr_debug in arch_acpi_numa_init() to avoid
potential boot noise on ACPI platforms that are not NUMA.
Based-on: https://github.com/linux-riscv/linux-riscv/tree/for-next
[1] https://drive.google.com/file/d/1YTdDx2IPm5IeZjAW932EYU-tUtgS08tX/view?usp=sharing
Testing:
Since the ACPI AIA/PLIC support patch set is still under upstream review,
hence it is tested using the poll based HVC SBI console and RAM disk.
1) Build latest Qemu with the following patch backported
42bd4eeefd
2) Build latest EDK-II
https://github.com/tianocore/edk2/blob/master/OvmfPkg/RiscVVirt/README.md
3) Build Linux with the following configs enabled
CONFIG_RISCV_SBI_V01=y
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_NONPORTABLE=y
CONFIG_HVC_RISCV_SBI=y
CONFIG_NUMA=y
CONFIG_ACPI_NUMA=y
4) Build buildroot rootfs.cpio
5) Launch the Qemu machine
qemu-system-riscv64 -nographic \
-machine virt,pflash0=pflash0,pflash1=pflash1 -smp 4 -m 8G \
-blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd \
-blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd \
-object memory-backend-ram,size=4G,id=m0 \
-object memory-backend-ram,size=4G,id=m1 \
-numa node,memdev=m0,cpus=0-1,nodeid=0 \
-numa node,memdev=m1,cpus=2-3,nodeid=1 \
-numa dist,src=0,dst=1,val=30 \
-kernel linux/arch/riscv/boot/Image \
-initrd buildroot/output/images/rootfs.cpio \
-append "root=/dev/ram ro console=hvc0 earlycon=sbi"
[ 0.000000] ACPI: SRAT: Node 0 PXM 0 [mem 0x80000000-0x17fffffff]
[ 0.000000] ACPI: SRAT: Node 1 PXM 1 [mem 0x180000000-0x27fffffff]
[ 0.000000] NUMA: NODE_DATA [mem 0x17fe3bc40-0x17fe3cfff]
[ 0.000000] NUMA: NODE_DATA [mem 0x27fff4c40-0x27fff5fff]
...
[ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> HARTID 0x0 -> Node 0
[ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> HARTID 0x1 -> Node 0
[ 0.000000] ACPI: NUMA: SRAT: PXM 1 -> HARTID 0x2 -> Node 1
[ 0.000000] ACPI: NUMA: SRAT: PXM 1 -> HARTID 0x3 -> Node 1
* b4-shazam-merge:
ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init
ACPI: NUMA: change the ACPI_NUMA to a hidden option
ACPI: NUMA: Add handler for SRAT RINTC affinity structure
ACPI: RISCV: Add NUMA support based on SRAT and SLIT
Link: https://lore.kernel.org/r/cover.1718268003.git.haibo1.xu@intel.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
commit
6a4aa4c94b
@ -1471,7 +1471,6 @@ config HOTPLUG_CPU
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config NUMA
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bool "NUMA Memory Allocation and Scheduler Support"
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select GENERIC_ARCH_NUMA
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select ACPI_NUMA if ACPI
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select OF_NUMA
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select HAVE_SETUP_PER_CPU_AREA
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select NEED_PER_CPU_EMBED_FIRST_CHUNK
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@ -473,7 +473,6 @@ config NR_CPUS
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config NUMA
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bool "NUMA Support"
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select SMP
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select ACPI_NUMA if ACPI
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help
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Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
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support. This option improves performance on systems with more
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@ -61,11 +61,14 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) { }
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void acpi_init_rintc_map(void);
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struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu);
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u32 get_acpi_id_for_cpu(int cpu);
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static inline u32 get_acpi_id_for_cpu(int cpu)
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{
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return acpi_cpu_get_madt_rintc(cpu)->uid;
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}
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int acpi_get_riscv_isa(struct acpi_table_header *table,
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unsigned int cpu, const char **isa);
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static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
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void acpi_get_cbo_block_size(struct acpi_table_header *table, u32 *cbom_size,
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u32 *cboz_size, u32 *cbop_size);
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#else
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@ -87,4 +90,12 @@ static inline void acpi_get_cbo_block_size(struct acpi_table_header *table,
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#endif /* CONFIG_ACPI */
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#ifdef CONFIG_ACPI_NUMA
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int acpi_numa_get_nid(unsigned int cpu);
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void acpi_map_cpus_to_nodes(void);
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#else
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static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
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static inline void acpi_map_cpus_to_nodes(void) { }
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#endif /* CONFIG_ACPI_NUMA */
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#endif /*_ASM_ACPI_H*/
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@ -110,3 +110,4 @@ obj-$(CONFIG_COMPAT) += compat_vdso/
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obj-$(CONFIG_64BIT) += pi/
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obj-$(CONFIG_ACPI) += acpi.o
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obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o
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@ -191,11 +191,6 @@ struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu)
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return &cpu_madt_rintc[cpu];
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}
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u32 get_acpi_id_for_cpu(int cpu)
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{
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return acpi_cpu_get_madt_rintc(cpu)->uid;
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}
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/*
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* __acpi_map_table() will be called before paging_init(), so early_ioremap()
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* or early_memremap() should be called here to for ACPI table mapping.
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131
arch/riscv/kernel/acpi_numa.c
Normal file
131
arch/riscv/kernel/acpi_numa.c
Normal file
@ -0,0 +1,131 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* ACPI 6.6 based NUMA setup for RISCV
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* Lots of code was borrowed from arch/arm64/kernel/acpi_numa.c
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*
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* Copyright 2004 Andi Kleen, SuSE Labs.
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* Copyright (C) 2013-2016, Linaro Ltd.
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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* Copyright (C) 2024 Intel Corporation.
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*
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* Reads the ACPI SRAT table to figure out what memory belongs to which CPUs.
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*
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* Called from acpi_numa_init while reading the SRAT and SLIT tables.
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* Assumes all memory regions belonging to a single proximity domain
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* are in one chunk. Holes between them will be included in the node.
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*/
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#define pr_fmt(fmt) "ACPI: NUMA: " fmt
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#include <linux/acpi.h>
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#include <linux/bitmap.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/memblock.h>
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#include <linux/mmzone.h>
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#include <linux/module.h>
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#include <linux/topology.h>
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#include <asm/numa.h>
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static int acpi_early_node_map[NR_CPUS] __initdata = { NUMA_NO_NODE };
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int __init acpi_numa_get_nid(unsigned int cpu)
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{
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return acpi_early_node_map[cpu];
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}
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static inline int get_cpu_for_acpi_id(u32 uid)
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{
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int cpu;
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for (cpu = 0; cpu < nr_cpu_ids; cpu++)
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if (uid == get_acpi_id_for_cpu(cpu))
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return cpu;
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return -EINVAL;
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}
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static int __init acpi_parse_rintc_pxm(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_srat_rintc_affinity *pa;
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int cpu, pxm, node;
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if (srat_disabled())
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return -EINVAL;
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pa = (struct acpi_srat_rintc_affinity *)header;
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if (!pa)
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return -EINVAL;
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if (!(pa->flags & ACPI_SRAT_RINTC_ENABLED))
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return 0;
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pxm = pa->proximity_domain;
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node = pxm_to_node(pxm);
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/*
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* If we can't map the UID to a logical cpu this
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* means that the UID is not part of possible cpus
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* so we do not need a NUMA mapping for it, skip
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* the SRAT entry and keep parsing.
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*/
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cpu = get_cpu_for_acpi_id(pa->acpi_processor_uid);
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if (cpu < 0)
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return 0;
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acpi_early_node_map[cpu] = node;
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pr_info("SRAT: PXM %d -> HARTID 0x%lx -> Node %d\n", pxm,
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cpuid_to_hartid_map(cpu), node);
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return 0;
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}
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void __init acpi_map_cpus_to_nodes(void)
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{
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int i;
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/*
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* In ACPI, SMP and CPU NUMA information is provided in separate
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* static tables, namely the MADT and the SRAT.
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*
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* Thus, it is simpler to first create the cpu logical map through
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* an MADT walk and then map the logical cpus to their node ids
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* as separate steps.
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*/
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acpi_table_parse_entries(ACPI_SIG_SRAT, sizeof(struct acpi_table_srat),
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ACPI_SRAT_TYPE_RINTC_AFFINITY, acpi_parse_rintc_pxm, 0);
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for (i = 0; i < nr_cpu_ids; i++)
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early_map_cpu_to_node(i, acpi_numa_get_nid(i));
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}
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/* Callback for Proximity Domain -> logical node ID mapping */
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void __init acpi_numa_rintc_affinity_init(struct acpi_srat_rintc_affinity *pa)
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{
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int pxm, node;
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if (srat_disabled())
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return;
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if (pa->header.length < sizeof(struct acpi_srat_rintc_affinity)) {
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pr_err("SRAT: Invalid SRAT header length: %d\n", pa->header.length);
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bad_srat();
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return;
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}
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if (!(pa->flags & ACPI_SRAT_RINTC_ENABLED))
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return;
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pxm = pa->proximity_domain;
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node = acpi_map_pxm_to_node(pxm);
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if (node == NUMA_NO_NODE) {
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pr_err("SRAT: Too many proximity domains %d\n", pxm);
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bad_srat();
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return;
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}
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node_set(node, numa_nodes_parsed);
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}
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@ -281,8 +281,10 @@ void __init setup_arch(char **cmdline_p)
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setup_smp();
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#endif
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if (!acpi_disabled)
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if (!acpi_disabled) {
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acpi_init_rintc_map();
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acpi_map_cpus_to_nodes();
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}
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riscv_init_cbo_blocksizes();
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riscv_fill_hwcap();
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@ -96,7 +96,6 @@ static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const un
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if (hart == cpuid_to_hartid_map(0)) {
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BUG_ON(found_boot_cpu);
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found_boot_cpu = true;
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early_map_cpu_to_node(0, acpi_numa_get_nid(cpu_count));
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return 0;
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}
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@ -106,7 +105,6 @@ static int __init acpi_parse_rintc(union acpi_subtable_headers *header, const un
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}
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cpuid_to_hartid_map(cpu_count) = hart;
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early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count));
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cpu_count++;
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return 0;
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@ -1,9 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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config ACPI_NUMA
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bool "NUMA support"
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depends on NUMA
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depends on (X86 || ARM64 || LOONGARCH)
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default y if ARM64
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def_bool NUMA && !X86
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config ACPI_HMAT
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bool "ACPI Heterogeneous Memory Attribute Table Support"
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@ -167,6 +167,19 @@ acpi_table_print_srat_entry(struct acpi_subtable_header *header)
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}
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}
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break;
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case ACPI_SRAT_TYPE_RINTC_AFFINITY:
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{
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struct acpi_srat_rintc_affinity *p =
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(struct acpi_srat_rintc_affinity *)header;
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pr_debug("SRAT Processor (acpi id[0x%04x]) in proximity domain %d %s\n",
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p->acpi_processor_uid,
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p->proximity_domain,
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(p->flags & ACPI_SRAT_RINTC_ENABLED) ?
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"enabled" : "disabled");
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}
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break;
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default:
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pr_warn("Found unsupported SRAT entry (type = 0x%x)\n",
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header->type);
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@ -450,6 +463,21 @@ acpi_parse_gi_affinity(union acpi_subtable_headers *header,
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}
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#endif /* defined(CONFIG_X86) || defined (CONFIG_ARM64) */
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static int __init
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acpi_parse_rintc_affinity(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct acpi_srat_rintc_affinity *rintc_affinity;
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rintc_affinity = (struct acpi_srat_rintc_affinity *)header;
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acpi_table_print_srat_entry(&header->common);
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/* let architecture-dependent part to do it */
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acpi_numa_rintc_affinity_init(rintc_affinity);
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return 0;
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}
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static int __init acpi_parse_srat(struct acpi_table_header *table)
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{
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struct acpi_table_srat *srat = (struct acpi_table_srat *)table;
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@ -485,7 +513,7 @@ int __init acpi_numa_init(void)
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/* SRAT: System Resource Affinity Table */
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if (!acpi_table_parse(ACPI_SIG_SRAT, acpi_parse_srat)) {
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struct acpi_subtable_proc srat_proc[4];
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struct acpi_subtable_proc srat_proc[5];
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memset(srat_proc, 0, sizeof(srat_proc));
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srat_proc[0].id = ACPI_SRAT_TYPE_CPU_AFFINITY;
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@ -496,6 +524,8 @@ int __init acpi_numa_init(void)
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srat_proc[2].handler = acpi_parse_gicc_affinity;
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srat_proc[3].id = ACPI_SRAT_TYPE_GENERIC_AFFINITY;
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srat_proc[3].handler = acpi_parse_gi_affinity;
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srat_proc[4].id = ACPI_SRAT_TYPE_RINTC_AFFINITY;
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srat_proc[4].handler = acpi_parse_rintc_affinity;
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acpi_table_parse_entries_array(ACPI_SIG_SRAT,
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sizeof(struct acpi_table_srat),
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@ -445,7 +445,7 @@ static int __init arch_acpi_numa_init(void)
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ret = acpi_numa_init();
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if (ret) {
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pr_info("Failed to initialise from firmware\n");
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pr_debug("Failed to initialise from firmware\n");
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return ret;
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}
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@ -259,6 +259,12 @@ static inline void
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acpi_numa_gicc_affinity_init(struct acpi_srat_gicc_affinity *pa) { }
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#endif
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#ifdef CONFIG_RISCV
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void acpi_numa_rintc_affinity_init(struct acpi_srat_rintc_affinity *pa);
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#else
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static inline void acpi_numa_rintc_affinity_init(struct acpi_srat_rintc_affinity *pa) { }
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#endif
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#ifndef PHYS_CPUID_INVALID
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typedef u32 phys_cpuid_t;
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#define PHYS_CPUID_INVALID (phys_cpuid_t)(-1)
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