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sparc64: Fix bugs in unrolled 256-bit loops.
Some dm-crypt testing revealed several bugs in the 256-bit unrolled loops. The DECRYPT_256_2() macro had two errors: 1) Missing reload of KEY registers %f60 and %f62 2) Missing "\" in penultimate line of definition. In aes_sparc64_ecb_decrypt_256, we were storing the second half of the encryption result from the wrong source registers. In aes_sparc64_ctr_crypt_256 we have to be careful when we fall out of the 32-byte-at-a-time loop and handle a trailing 16-byte chunk. In that case we've clobbered the final key holding registers and have to restore them before executing the ENCRYPT_256() macro. Inside of the 32-byte-at-a-time loop things are OK, because we do this key register restoring during the first few rounds of the ENCRYPT_256_2() macro. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -188,6 +188,8 @@
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ldd [%o0 + 0x18], %f56; \
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ldd [%o0 + 0x10], %f58; \
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DECRYPT_256_TWO_ROUNDS_2(KEY_BASE + 8, I0, I1, I2, I3, KEY_BASE + 0) \
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ldd [%o0 + 0x08], %f60; \
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ldd [%o0 + 0x00], %f62; \
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DECRYPT_256_TWO_ROUNDS_2(KEY_BASE + 16, I0, I1, I2, I3, KEY_BASE + 0) \
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DECRYPT_256_TWO_ROUNDS_2(KEY_BASE + 24, I0, I1, I2, I3, KEY_BASE + 0) \
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DECRYPT_256_TWO_ROUNDS_2(KEY_BASE + 32, I0, I1, I2, I3, KEY_BASE + 0) \
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@ -201,7 +203,7 @@
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ldd [%o0 + 0xd8], %f8; \
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ldd [%o0 + 0xd0], %f10; \
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AES_DROUND23_L(KEY_BASE + 52, KEY_BASE + 4, KEY_BASE + 6, I3) \
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AES_DROUND01_L(KEY_BASE + 54, KEY_BASE + 4, KEY_BASE + 6, I2)
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AES_DROUND01_L(KEY_BASE + 54, KEY_BASE + 4, KEY_BASE + 6, I2) \
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ldd [%o0 + 0xc8], %f12; \
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ldd [%o0 + 0xc0], %f14;
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@ -1144,8 +1146,8 @@ ENTRY(aes_sparc64_ecb_decrypt_256)
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DECRYPT_256_2(8, 4, 6, 0, 2)
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std %f4, [%o2 + 0x00]
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std %f6, [%o2 + 0x08]
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std %f60, [%o2 + 0x10]
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std %f62, [%o2 + 0x18]
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std %f0, [%o2 + 0x10]
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std %f2, [%o2 + 0x18]
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sub %o3, 0x20, %o3
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add %o1, 0x20, %o1
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brgz,pt %o3, 1b
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@ -1509,6 +1511,10 @@ ENTRY(aes_sparc64_ctr_crypt_256)
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add %o2, 0x20, %o2
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brlz,pt %o3, 11f
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nop
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ldd [%o0 + 0xd0], %f56
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ldd [%o0 + 0xd8], %f58
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ldd [%o0 + 0xe0], %f60
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ldd [%o0 + 0xe8], %f62
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10: xor %g1, %g3, %o5
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MOVXTOD_O5_F0
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xor %g2, %g7, %o5
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