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PCI: imx6: Fix link training status detection in link up check
This bug was introduced in the interaction for two commits on either branch of the merge commit562df5c852
("Merge branch 'pci/host-designware' into next"). Commit4d107d3b5a
("PCI: imx6: Move link up check into imx6_pcie_wait_for_link()"), changed imx6_pcie_wait_for_link() to poll the link status register directly, checking for link up and not training, and made imx6_pcie_link_up() only check the link up bit (once, not a polling loop). While commit886bc5ceb5
("PCI: designware: Add generic dw_pcie_wait_for_link()"), replaced the loop in imx6_pcie_wait_for_link() with a call to a new dwc core function, which polled imx6_pcie_link_up(), which still checked both link up and not training in a loop. When these two commits were merged, the version of imx6_pcie_wait_for_link() from886bc5ceb5
was kept, which eliminated the link training check placed there by4d107d3b5a
. However, the version of imx6_pcie_link_up() from4d107d3b5a
was kept, which eliminated the link training check that had been there and was moved to imx6_pcie_wait_for_link(). The result was the link training check got lost for the imx6 driver. Eliminate imx6_pcie_link_up() so that the default handler, dw_pcie_link_up(), is used instead. The default handler has the correct code, which checks for link up and also that it still is not training, fixing the regression. Fixes:562df5c852
("Merge branch 'pci/host-designware' into next") Signed-off-by: Trent Piepho <tpiepho@impinj.com> [lorenzo.pieralisi@arm.com: rewrote the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Joao Pinto <Joao.Pinto@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Richard Zhu <hongxing.zhu@nxp.com>
This commit is contained in:
parent
651022382c
commit
68bc10bf99
@ -81,8 +81,6 @@ struct imx6_pcie {
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#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
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#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
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#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
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#define PCIE_PHY_DEBUG_R1_XMLH_LINK_IN_TRAINING (1 << 29)
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#define PCIE_PHY_DEBUG_R1_XMLH_LINK_UP (1 << 4)
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#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
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#define PCIE_PHY_CTRL_DATA_LOC 0
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@ -711,12 +709,6 @@ static int imx6_pcie_host_init(struct pcie_port *pp)
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return 0;
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}
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static int imx6_pcie_link_up(struct dw_pcie *pci)
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{
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return dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1) &
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PCIE_PHY_DEBUG_R1_XMLH_LINK_UP;
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}
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static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
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.host_init = imx6_pcie_host_init,
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};
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@ -749,7 +741,7 @@ static int imx6_add_pcie_port(struct imx6_pcie *imx6_pcie,
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}
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static const struct dw_pcie_ops dw_pcie_ops = {
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.link_up = imx6_pcie_link_up,
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/* No special ops needed, but pcie-designware still expects this struct */
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};
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#ifdef CONFIG_PM_SLEEP
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