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Linux 4.20-rc6
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAlwNpb0eHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGwGwH/00UHnXfxww3ixxz zwTVDzptA6SPm6s84yJOWatM5fXhPiAltZaHSYF9lzRzNU71NCq7Frhq3fQUIXKM OxqDn9nfSTWcjWTk2q5n2keyRV/KIn67YX7UgqFc1bO/mqtVjEgNWaMyblhI+e9E giu1ZXayHr43jK1cDOmGExZubXUq7Vsc9TOlrd+d2SwIqeEP7TCMrPhnHDwCNvX2 UU5dtANpVzGtHaBcr37wJj+L8kODCc0f+PQ3g2ar5jTHst5SLlHp2u0AMRnUmgdi VkGx+mu/uk8mtwUqMIMqhplklVoqK6LTeLqsY5Xt32SKruw9UqyJGdphLjW2QP/g MkmA1lI= =7kaD -----END PGP SIGNATURE----- Merge tag 'v4.20-rc6' into i2c/for-5.0 Linux 4.20-rc6
This commit is contained in:
commit
66693960f5
@ -1,4 +1,4 @@
|
||||
What: /sys/class/net/<iface>/tagging
|
||||
What: /sys/class/net/<iface>/dsa/tagging
|
||||
Date: August 2018
|
||||
KernelVersion: 4.20
|
||||
Contact: netdev@vger.kernel.org
|
||||
|
@ -856,7 +856,8 @@
|
||||
causing system reset or hang due to sending
|
||||
INIT from AP to BSP.
|
||||
|
||||
disable_counter_freezing [HW]
|
||||
perf_v4_pmi= [X86,INTEL]
|
||||
Format: <bool>
|
||||
Disable Intel PMU counter freezing feature.
|
||||
The feature only exists starting from
|
||||
Arch Perfmon v4 (Skylake and newer).
|
||||
@ -3504,6 +3505,10 @@
|
||||
before loading.
|
||||
See Documentation/blockdev/ramdisk.txt.
|
||||
|
||||
psi= [KNL] Enable or disable pressure stall information
|
||||
tracking.
|
||||
Format: <bool>
|
||||
|
||||
psmouse.proto= [HW,MOUSE] Highest PS2 mouse protocol extension to
|
||||
probe for; one of (bare|imps|exps|lifebook|any).
|
||||
psmouse.rate= [HW,MOUSE] Set desired mouse report rate, in reports
|
||||
@ -4194,9 +4199,13 @@
|
||||
|
||||
spectre_v2= [X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability.
|
||||
The default operation protects the kernel from
|
||||
user space attacks.
|
||||
|
||||
on - unconditionally enable
|
||||
off - unconditionally disable
|
||||
on - unconditionally enable, implies
|
||||
spectre_v2_user=on
|
||||
off - unconditionally disable, implies
|
||||
spectre_v2_user=off
|
||||
auto - kernel detects whether your CPU model is
|
||||
vulnerable
|
||||
|
||||
@ -4206,6 +4215,12 @@
|
||||
CONFIG_RETPOLINE configuration option, and the
|
||||
compiler with which the kernel was built.
|
||||
|
||||
Selecting 'on' will also enable the mitigation
|
||||
against user space to user space task attacks.
|
||||
|
||||
Selecting 'off' will disable both the kernel and
|
||||
the user space protections.
|
||||
|
||||
Specific mitigations can also be selected manually:
|
||||
|
||||
retpoline - replace indirect branches
|
||||
@ -4215,6 +4230,48 @@
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2=auto.
|
||||
|
||||
spectre_v2_user=
|
||||
[X86] Control mitigation of Spectre variant 2
|
||||
(indirect branch speculation) vulnerability between
|
||||
user space tasks
|
||||
|
||||
on - Unconditionally enable mitigations. Is
|
||||
enforced by spectre_v2=on
|
||||
|
||||
off - Unconditionally disable mitigations. Is
|
||||
enforced by spectre_v2=off
|
||||
|
||||
prctl - Indirect branch speculation is enabled,
|
||||
but mitigation can be enabled via prctl
|
||||
per thread. The mitigation control state
|
||||
is inherited on fork.
|
||||
|
||||
prctl,ibpb
|
||||
- Like "prctl" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different user
|
||||
space processes.
|
||||
|
||||
seccomp
|
||||
- Same as "prctl" above, but all seccomp
|
||||
threads will enable the mitigation unless
|
||||
they explicitly opt out.
|
||||
|
||||
seccomp,ibpb
|
||||
- Like "seccomp" above, but only STIBP is
|
||||
controlled per thread. IBPB is issued
|
||||
always when switching between different
|
||||
user space processes.
|
||||
|
||||
auto - Kernel selects the mitigation depending on
|
||||
the available CPU features and vulnerability.
|
||||
|
||||
Default mitigation:
|
||||
If CONFIG_SECCOMP=y then "seccomp", otherwise "prctl"
|
||||
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2_user=auto.
|
||||
|
||||
spec_store_bypass_disable=
|
||||
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
|
||||
(Speculative Store Bypass vulnerability)
|
||||
|
@ -57,6 +57,7 @@ stable kernels.
|
||||
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
|
||||
| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
|
||||
| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 |
|
||||
| ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 |
|
||||
| ARM | MMU-500 | #841119,#826419 | N/A |
|
||||
| | | | |
|
||||
| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
|
||||
|
@ -168,3 +168,19 @@ a shared clock is forbidden.
|
||||
|
||||
Configuration of common clocks, which affect multiple consumer devices can
|
||||
be similarly specified in the clock provider node.
|
||||
|
||||
==Protected clocks==
|
||||
|
||||
Some platforms or firmwares may not fully expose all the clocks to the OS, such
|
||||
as in situations where those clks are used by drivers running in ARM secure
|
||||
execution levels. Such a configuration can be specified in device tree with the
|
||||
protected-clocks property in the form of a clock specifier list. This property should
|
||||
only be specified in the node that is providing the clocks being protected:
|
||||
|
||||
clock-controller@a000f000 {
|
||||
compatible = "vendor,clk95;
|
||||
reg = <0xa000f000 0x1000>
|
||||
#clocks-cells = <1>;
|
||||
...
|
||||
protected-clocks = <UART3_CLK>, <SPI5_CLK>;
|
||||
};
|
||||
|
@ -12,7 +12,7 @@ The /chosen node should contain a 'linux,sysrq-reset-seq' child node to define
|
||||
a set of keys.
|
||||
|
||||
Required property:
|
||||
sysrq-reset-seq: array of Linux keycodes, one keycode per cell.
|
||||
keyset: array of Linux keycodes, one keycode per cell.
|
||||
|
||||
Optional property:
|
||||
timeout-ms: duration keys must be pressed together in milliseconds before
|
||||
|
@ -1,29 +0,0 @@
|
||||
device-tree bindings for rockchip VPU codec
|
||||
|
||||
Rockchip (Video Processing Unit) present in various Rockchip platforms,
|
||||
such as RK3288 and RK3399.
|
||||
|
||||
Required properties:
|
||||
- compatible: value should be one of the following
|
||||
"rockchip,rk3288-vpu";
|
||||
"rockchip,rk3399-vpu";
|
||||
- interrupts: encoding and decoding interrupt specifiers
|
||||
- interrupt-names: should be "vepu" and "vdpu"
|
||||
- clocks: phandle to VPU aclk, hclk clocks
|
||||
- clock-names: should be "aclk" and "hclk"
|
||||
- power-domains: phandle to power domain node
|
||||
- iommus: phandle to a iommu node
|
||||
|
||||
Example:
|
||||
SoC-specific DT entry:
|
||||
vpu: video-codec@ff9a0000 {
|
||||
compatible = "rockchip,rk3288-vpu";
|
||||
reg = <0x0 0xff9a0000 0x0 0x800>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "vepu", "vdpu";
|
||||
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
|
||||
clock-names = "aclk", "hclk";
|
||||
power-domains = <&power RK3288_PD_VIDEO>;
|
||||
iommus = <&vpu_mmu>;
|
||||
};
|
@ -40,24 +40,36 @@ Required properties:
|
||||
"ref" for 19.2 MHz ref clk,
|
||||
"com_aux" for phy common block aux clock,
|
||||
"ref_aux" for phy reference aux clock,
|
||||
|
||||
For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed.
|
||||
For "qcom,msm8996-qmp-pcie-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref".
|
||||
For "qcom,msm8996-qmp-usb3-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref".
|
||||
For "qcom,qmp-v3-usb3-phy" must contain:
|
||||
For "qcom,sdm845-qmp-usb3-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref", "com_aux".
|
||||
For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
|
||||
"aux", "cfg_ahb", "ref", "com_aux".
|
||||
For "qcom,sdm845-qmp-ufs-phy" must contain:
|
||||
"ref", "ref_aux".
|
||||
|
||||
- resets: a list of phandles and reset controller specifier pairs,
|
||||
one for each entry in reset-names.
|
||||
- reset-names: "phy" for reset of phy block,
|
||||
"common" for phy common block reset,
|
||||
"cfg" for phy's ahb cfg block reset (Optional).
|
||||
"cfg" for phy's ahb cfg block reset.
|
||||
|
||||
For "qcom,ipq8074-qmp-pcie-phy" must contain:
|
||||
"phy", "common".
|
||||
For "qcom,msm8996-qmp-pcie-phy" must contain:
|
||||
"phy", "common", "cfg".
|
||||
For "qcom,msm8996-qmp-usb3-phy" must contain
|
||||
"phy", "common".
|
||||
For "qcom,ipq8074-qmp-pcie-phy" must contain:
|
||||
For "qcom,sdm845-qmp-usb3-phy" must contain:
|
||||
"phy", "common".
|
||||
For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
|
||||
"phy", "common".
|
||||
For "qcom,sdm845-qmp-ufs-phy": no resets are listed.
|
||||
|
||||
- vdda-phy-supply: Phandle to a regulator supply to PHY core block.
|
||||
- vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
|
||||
@ -79,9 +91,10 @@ Required properties for child node:
|
||||
|
||||
- #phy-cells: must be 0
|
||||
|
||||
Required properties child node of pcie and usb3 qmp phys:
|
||||
- clocks: a list of phandles and clock-specifier pairs,
|
||||
one for each entry in clock-names.
|
||||
- clock-names: Must contain following for pcie and usb qmp phys:
|
||||
- clock-names: Must contain following:
|
||||
"pipe<lane-number>" for pipe clock specific to each lane.
|
||||
- clock-output-names: Name of the PHY clock that will be the parent for
|
||||
the above pipe clock.
|
||||
@ -91,9 +104,11 @@ Required properties for child node:
|
||||
(or)
|
||||
"pcie20_phy1_pipe_clk"
|
||||
|
||||
Required properties for child node of PHYs with lane reset, AKA:
|
||||
"qcom,msm8996-qmp-pcie-phy"
|
||||
- resets: a list of phandles and reset controller specifier pairs,
|
||||
one for each entry in reset-names.
|
||||
- reset-names: Must contain following for pcie qmp phys:
|
||||
- reset-names: Must contain following:
|
||||
"lane<lane-number>" for reset specific to each lane.
|
||||
|
||||
Example:
|
||||
|
@ -5,18 +5,20 @@ UniPhier SoCs have SCSSI which supports SPI single channel.
|
||||
Required properties:
|
||||
- compatible: should be "socionext,uniphier-scssi"
|
||||
- reg: address and length of the spi master registers
|
||||
- #address-cells: must be <1>, see spi-bus.txt
|
||||
- #size-cells: must be <0>, see spi-bus.txt
|
||||
- clocks: A phandle to the clock for the device.
|
||||
- resets: A phandle to the reset control for the device.
|
||||
- interrupts: a single interrupt specifier
|
||||
- pinctrl-names: should be "default"
|
||||
- pinctrl-0: pin control state for the default mode
|
||||
- clocks: a phandle to the clock for the device
|
||||
- resets: a phandle to the reset control for the device
|
||||
|
||||
Example:
|
||||
|
||||
spi0: spi@54006000 {
|
||||
compatible = "socionext,uniphier-scssi";
|
||||
reg = <0x54006000 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 39 4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&peri_clk 11>;
|
||||
resets = <&peri_rst 11>;
|
||||
};
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _media_ioc_request_alloc:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _media_request_ioc_queue:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _media_request_ioc_reinit:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _media-request-api:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _request-func-close:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _request-func-ioctl:
|
||||
|
||||
|
@ -1,4 +1,28 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
.. This file is dual-licensed: you can use it either under the terms
|
||||
.. of the GPL or the GFDL 1.1+ license, at your option. Note that this
|
||||
.. dual licensing only applies to this file, and not this project as a
|
||||
.. whole.
|
||||
..
|
||||
.. a) This file is free software; you can redistribute it and/or
|
||||
.. modify it under the terms of the GNU General Public License as
|
||||
.. published by the Free Software Foundation; either version 2 of
|
||||
.. the License, or (at your option) any later version.
|
||||
..
|
||||
.. This file is distributed in the hope that it will be useful,
|
||||
.. but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
.. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
.. GNU General Public License for more details.
|
||||
..
|
||||
.. Or, alternatively,
|
||||
..
|
||||
.. b) Permission is granted to copy, distribute and/or modify this
|
||||
.. document under the terms of the GNU Free Documentation License,
|
||||
.. Version 1.1 or any later version published by the Free Software
|
||||
.. Foundation, with no Invariant Sections, no Front-Cover Texts
|
||||
.. and no Back-Cover Texts. A copy of the license is included at
|
||||
.. Documentation/media/uapi/fdl-appendix.rst.
|
||||
..
|
||||
.. TODO: replace it to GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
|
||||
|
||||
.. _request-func-poll:
|
||||
|
||||
|
@ -92,3 +92,12 @@ Speculation misfeature controls
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
||||
- PR_SPEC_INDIR_BRANCH: Indirect Branch Speculation in User Processes
|
||||
(Mitigate Spectre V2 style attacks against user processes)
|
||||
|
||||
Invocations:
|
||||
* prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, 0, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_ENABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_DISABLE, 0, 0);
|
||||
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_FORCE_DISABLE, 0, 0);
|
||||
|
@ -61,18 +61,6 @@ Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields
|
||||
to struct boot_params for loading bzImage and ramdisk
|
||||
above 4G in 64bit.
|
||||
|
||||
Protocol 2.13: (Kernel 3.14) Support 32- and 64-bit flags being set in
|
||||
xloadflags to support booting a 64-bit kernel from 32-bit
|
||||
EFI
|
||||
|
||||
Protocol 2.14: (Kernel 4.20) Added acpi_rsdp_addr holding the physical
|
||||
address of the ACPI RSDP table.
|
||||
The bootloader updates version with:
|
||||
0x8000 | min(kernel-version, bootloader-version)
|
||||
kernel-version being the protocol version supported by
|
||||
the kernel and bootloader-version the protocol version
|
||||
supported by the bootloader.
|
||||
|
||||
**** MEMORY LAYOUT
|
||||
|
||||
The traditional memory map for the kernel loader, used for Image or
|
||||
@ -209,7 +197,6 @@ Offset Proto Name Meaning
|
||||
0258/8 2.10+ pref_address Preferred loading address
|
||||
0260/4 2.10+ init_size Linear memory required during initialization
|
||||
0264/4 2.11+ handover_offset Offset of handover entry point
|
||||
0268/8 2.14+ acpi_rsdp_addr Physical address of RSDP table
|
||||
|
||||
(1) For backwards compatibility, if the setup_sects field contains 0, the
|
||||
real value is 4.
|
||||
@ -322,7 +309,7 @@ Protocol: 2.00+
|
||||
Contains the magic number "HdrS" (0x53726448).
|
||||
|
||||
Field name: version
|
||||
Type: modify
|
||||
Type: read
|
||||
Offset/size: 0x206/2
|
||||
Protocol: 2.00+
|
||||
|
||||
@ -330,12 +317,6 @@ Protocol: 2.00+
|
||||
e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version
|
||||
10.17.
|
||||
|
||||
Up to protocol version 2.13 this information is only read by the
|
||||
bootloader. From protocol version 2.14 onwards the bootloader will
|
||||
write the used protocol version or-ed with 0x8000 to the field. The
|
||||
used protocol version will be the minimum of the supported protocol
|
||||
versions of the bootloader and the kernel.
|
||||
|
||||
Field name: realmode_swtch
|
||||
Type: modify (optional)
|
||||
Offset/size: 0x208/4
|
||||
@ -763,17 +744,6 @@ Offset/size: 0x264/4
|
||||
|
||||
See EFI HANDOVER PROTOCOL below for more details.
|
||||
|
||||
Field name: acpi_rsdp_addr
|
||||
Type: write
|
||||
Offset/size: 0x268/8
|
||||
Protocol: 2.14+
|
||||
|
||||
This field can be set by the boot loader to tell the kernel the
|
||||
physical address of the ACPI RSDP table.
|
||||
|
||||
A value of 0 indicates the kernel should fall back to the standard
|
||||
methods to locate the RSDP.
|
||||
|
||||
|
||||
**** THE IMAGE CHECKSUM
|
||||
|
||||
|
142
MAINTAINERS
142
MAINTAINERS
@ -1472,6 +1472,7 @@ F: drivers/clk/sirf/
|
||||
F: drivers/clocksource/timer-prima2.c
|
||||
F: drivers/clocksource/timer-atlas7.c
|
||||
N: [^a-z]sirf
|
||||
X: drivers/gnss
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
@ -1923,7 +1924,6 @@ ARM/QUALCOMM SUPPORT
|
||||
M: Andy Gross <andy.gross@linaro.org>
|
||||
M: David Brown <david.brown@linaro.org>
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
L: linux-soc@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/soc/qcom/
|
||||
F: arch/arm/boot/dts/qcom-*.dts
|
||||
@ -2491,7 +2491,7 @@ F: drivers/net/wireless/ath/*
|
||||
ATHEROS ATH5K WIRELESS DRIVER
|
||||
M: Jiri Slaby <jirislaby@gmail.com>
|
||||
M: Nick Kossifidis <mickflemm@gmail.com>
|
||||
M: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/ath5k
|
||||
S: Maintained
|
||||
@ -2801,7 +2801,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git
|
||||
Q: https://patchwork.ozlabs.org/project/netdev/list/?delegate=77147
|
||||
S: Supported
|
||||
F: arch/x86/net/bpf_jit*
|
||||
F: arch/*/net/*
|
||||
F: Documentation/networking/filter.txt
|
||||
F: Documentation/bpf/
|
||||
F: include/linux/bpf*
|
||||
@ -2821,6 +2821,67 @@ F: tools/bpf/
|
||||
F: tools/lib/bpf/
|
||||
F: tools/testing/selftests/bpf/
|
||||
|
||||
BPF JIT for ARM
|
||||
M: Shubham Bansal <illusionist.neo@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/net/
|
||||
|
||||
BPF JIT for ARM64
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
M: Alexei Starovoitov <ast@kernel.org>
|
||||
M: Zi Shen Lim <zlim.lnx@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/arm64/net/
|
||||
|
||||
BPF JIT for MIPS (32-BIT AND 64-BIT)
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/net/
|
||||
|
||||
BPF JIT for NFP NICs
|
||||
M: Jakub Kicinski <jakub.kicinski@netronome.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/netronome/nfp/bpf/
|
||||
|
||||
BPF JIT for POWERPC (32-BIT AND 64-BIT)
|
||||
M: Naveen N. Rao <naveen.n.rao@linux.ibm.com>
|
||||
M: Sandipan Das <sandipan@linux.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/powerpc/net/
|
||||
|
||||
BPF JIT for S390
|
||||
M: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
||||
M: Heiko Carstens <heiko.carstens@de.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/s390/net/
|
||||
X: arch/s390/net/pnet.c
|
||||
|
||||
BPF JIT for SPARC (32-BIT AND 64-BIT)
|
||||
M: David S. Miller <davem@davemloft.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/sparc/net/
|
||||
|
||||
BPF JIT for X86 32-BIT
|
||||
M: Wang YanQing <udknight@gmail.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/x86/net/bpf_jit_comp32.c
|
||||
|
||||
BPF JIT for X86 64-BIT
|
||||
M: Alexei Starovoitov <ast@kernel.org>
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/x86/net/
|
||||
X: arch/x86/net/bpf_jit_comp32.c
|
||||
|
||||
BROADCOM B44 10/100 ETHERNET DRIVER
|
||||
M: Michael Chan <michael.chan@broadcom.com>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -2861,7 +2922,7 @@ F: drivers/staging/vc04_services
|
||||
BROADCOM BCM47XX MIPS ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/mips/brcm/
|
||||
F: arch/mips/bcm47xx/*
|
||||
@ -2870,7 +2931,6 @@ F: arch/mips/include/asm/mach-bcm47xx/*
|
||||
BROADCOM BCM5301X ARM ARCHITECTURE
|
||||
M: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
M: Jon Mason <jonmason@broadcom.com>
|
||||
M: bcm-kernel-feedback-list@broadcom.com
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
S: Maintained
|
||||
@ -2925,7 +2985,7 @@ F: drivers/cpufreq/bmips-cpufreq.c
|
||||
BROADCOM BMIPS MIPS ARCHITECTURE
|
||||
M: Kevin Cernekee <cernekee@gmail.com>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
T: git git://github.com/broadcom/stblinux.git
|
||||
S: Maintained
|
||||
F: arch/mips/bmips/*
|
||||
@ -3016,7 +3076,6 @@ F: drivers/net/ethernet/broadcom/genet/
|
||||
BROADCOM IPROC ARM ARCHITECTURE
|
||||
M: Ray Jui <rjui@broadcom.com>
|
||||
M: Scott Branden <sbranden@broadcom.com>
|
||||
M: Jon Mason <jonmason@broadcom.com>
|
||||
M: bcm-kernel-feedback-list@broadcom.com
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://github.com/broadcom/cygnus-linux.git
|
||||
@ -3063,7 +3122,7 @@ F: include/uapi/rdma/bnxt_re-abi.h
|
||||
|
||||
BROADCOM NVRAM DRIVER
|
||||
M: Rafał Miłecki <zajec5@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/firmware/broadcom/*
|
||||
|
||||
@ -3213,11 +3272,16 @@ S: Maintained
|
||||
F: sound/pci/oxygen/
|
||||
|
||||
C-SKY ARCHITECTURE
|
||||
M: Guo Ren <ren_guo@c-sky.com>
|
||||
M: Guo Ren <guoren@kernel.org>
|
||||
T: git https://github.com/c-sky/csky-linux.git
|
||||
S: Supported
|
||||
F: arch/csky/
|
||||
F: Documentation/devicetree/bindings/csky/
|
||||
F: drivers/irqchip/irq-csky-*
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/csky,*
|
||||
F: drivers/clocksource/timer-gx6605s.c
|
||||
F: drivers/clocksource/timer-mp-csky.c
|
||||
F: Documentation/devicetree/bindings/timer/csky,*
|
||||
K: csky
|
||||
N: csky
|
||||
|
||||
@ -4165,7 +4229,7 @@ F: net/decnet/
|
||||
|
||||
DECSTATION PLATFORM SUPPORT
|
||||
M: "Maciej W. Rozycki" <macro@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
W: http://www.linux-mips.org/wiki/DECstation
|
||||
S: Maintained
|
||||
F: arch/mips/dec/
|
||||
@ -5256,7 +5320,7 @@ EDAC-CAVIUM OCTEON
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
M: David Daney <david.daney@cavium.com>
|
||||
L: linux-edac@vger.kernel.org
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/edac/octeon_edac*
|
||||
|
||||
@ -5774,7 +5838,7 @@ F: include/uapi/linux/firewire*.h
|
||||
F: tools/firewire/
|
||||
|
||||
FIRMWARE LOADER (request_firmware)
|
||||
M: Luis R. Rodriguez <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/firmware_class/
|
||||
@ -6258,6 +6322,7 @@ F: include/uapi/linux/gigaset_dev.h
|
||||
|
||||
GNSS SUBSYSTEM
|
||||
M: Johan Hovold <johan@kernel.org>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/johan/gnss.git
|
||||
S: Maintained
|
||||
F: Documentation/ABI/testing/sysfs-class-gnss
|
||||
F: Documentation/devicetree/bindings/gnss/
|
||||
@ -7703,7 +7768,7 @@ F: Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.txt
|
||||
|
||||
IOC3 ETHERNET DRIVER
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/sgi/ioc3-eth.c
|
||||
|
||||
@ -8074,7 +8139,7 @@ F: tools/testing/selftests/
|
||||
F: Documentation/dev-tools/kselftest*
|
||||
|
||||
KERNEL USERMODE HELPER
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: kernel/umh.c
|
||||
@ -8131,7 +8196,7 @@ F: arch/arm64/kvm/
|
||||
|
||||
KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)
|
||||
M: James Hogan <jhogan@kernel.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/include/uapi/asm/kvm*
|
||||
F: arch/mips/include/asm/kvm*
|
||||
@ -8250,7 +8315,7 @@ F: mm/kmemleak.c
|
||||
F: mm/kmemleak-test.c
|
||||
|
||||
KMOD KERNEL MODULE LOADER - USERMODE HELPER
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: kernel/kmod.c
|
||||
@ -8304,7 +8369,7 @@ F: drivers/net/dsa/lantiq_gswip.c
|
||||
|
||||
LANTIQ MIPS ARCHITECTURE
|
||||
M: John Crispin <john@phrozen.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/lantiq
|
||||
F: drivers/soc/lantiq
|
||||
@ -8867,7 +8932,7 @@ S: Maintained
|
||||
|
||||
MARDUK (CREATOR CI40) DEVICE TREE SUPPORT
|
||||
M: Rahul Bedarkar <rahulbedarkar89@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/img/pistachio_marduk.dts
|
||||
|
||||
@ -9826,7 +9891,7 @@ F: drivers/dma/at_xdmac.c
|
||||
|
||||
MICROSEMI MIPS SOCS
|
||||
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/generic/board-ocelot.c
|
||||
F: arch/mips/configs/generic/board-ocelot.config
|
||||
@ -9866,7 +9931,7 @@ MIPS
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
M: James Hogan <jhogan@kernel.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
W: http://www.linux-mips.org/
|
||||
T: git git://git.linux-mips.org/pub/scm/ralf/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git
|
||||
@ -9879,7 +9944,7 @@ F: drivers/platform/mips/
|
||||
|
||||
MIPS BOSTON DEVELOPMENT BOARD
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
|
||||
F: arch/mips/boot/dts/img/boston.dts
|
||||
@ -9889,7 +9954,7 @@ F: include/dt-bindings/clock/boston-clock.h
|
||||
|
||||
MIPS GENERIC PLATFORM
|
||||
M: Paul Burton <paul.burton@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
|
||||
F: arch/mips/generic/
|
||||
@ -9897,7 +9962,7 @@ F: arch/mips/tools/generic-board-config.sh
|
||||
|
||||
MIPS/LOONGSON1 ARCHITECTURE
|
||||
M: Keguang Zhang <keguang.zhang@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson32/
|
||||
F: arch/mips/include/asm/mach-loongson32/
|
||||
@ -9906,7 +9971,7 @@ F: drivers/*/*/*loongson1*
|
||||
|
||||
MIPS/LOONGSON2 ARCHITECTURE
|
||||
M: Jiaxun Yang <jiaxun.yang@flygoat.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson64/fuloong-2e/
|
||||
F: arch/mips/loongson64/lemote-2f/
|
||||
@ -9916,7 +9981,7 @@ F: drivers/*/*/*loongson2*
|
||||
|
||||
MIPS/LOONGSON3 ARCHITECTURE
|
||||
M: Huacai Chen <chenhc@lemote.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/loongson64/
|
||||
F: arch/mips/include/asm/mach-loongson64/
|
||||
@ -9926,7 +9991,7 @@ F: drivers/*/*/*loongson3*
|
||||
|
||||
MIPS RINT INSTRUCTION EMULATION
|
||||
M: Aleksandar Markovic <aleksandar.markovic@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/math-emu/sp_rint.c
|
||||
F: arch/mips/math-emu/dp_rint.c
|
||||
@ -10911,7 +10976,7 @@ F: include/linux/platform_data/i2c-omap.h
|
||||
|
||||
ONION OMEGA2+ BOARD
|
||||
M: Harvey Hunt <harveyhuntnexus@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/ralink/omega2p.dts
|
||||
|
||||
@ -11820,7 +11885,7 @@ F: drivers/pinctrl/spear/
|
||||
|
||||
PISTACHIO SOC SUPPORT
|
||||
M: James Hartley <james.hartley@sondrel.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
F: arch/mips/pistachio/
|
||||
F: arch/mips/include/asm/mach-pistachio/
|
||||
@ -12000,7 +12065,7 @@ F: kernel/printk/
|
||||
F: include/linux/printk.h
|
||||
|
||||
PRISM54 WIRELESS DRIVER
|
||||
M: "Luis R. Rodriguez" <mcgrof@gmail.com>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
W: http://wireless.kernel.org/en/users/Drivers/p54
|
||||
S: Obsolete
|
||||
@ -12014,9 +12079,10 @@ S: Maintained
|
||||
F: fs/proc/
|
||||
F: include/linux/proc_fs.h
|
||||
F: tools/testing/selftests/proc/
|
||||
F: Documentation/filesystems/proc.txt
|
||||
|
||||
PROC SYSCTL
|
||||
M: "Luis R. Rodriguez" <mcgrof@kernel.org>
|
||||
M: Luis Chamberlain <mcgrof@kernel.org>
|
||||
M: Kees Cook <keescook@chromium.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
@ -12479,7 +12545,7 @@ F: drivers/media/usb/rainshadow-cec/*
|
||||
|
||||
RALINK MIPS ARCHITECTURE
|
||||
M: John Crispin <john@phrozen.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/ralink
|
||||
|
||||
@ -12499,7 +12565,7 @@ F: drivers/block/brd.c
|
||||
|
||||
RANCHU VIRTUAL BOARD FOR MIPS
|
||||
M: Miodrag Dinic <miodrag.dinic@mips.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/mips/generic/board-ranchu.c
|
||||
F: arch/mips/configs/generic/board-ranchu.config
|
||||
@ -13824,6 +13890,13 @@ F: drivers/md/raid*
|
||||
F: include/linux/raid/
|
||||
F: include/uapi/linux/raid/
|
||||
|
||||
SOCIONEXT (SNI) AVE NETWORK DRIVER
|
||||
M: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/socionext/sni_ave.c
|
||||
F: Documentation/devicetree/bindings/net/socionext,uniphier-ave4.txt
|
||||
|
||||
SOCIONEXT (SNI) NETSEC NETWORK DRIVER
|
||||
M: Jassi Brar <jaswinder.singh@linaro.org>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -13949,6 +14022,7 @@ S: Supported
|
||||
F: Documentation/devicetree/bindings/sound/
|
||||
F: Documentation/sound/soc/
|
||||
F: sound/soc/
|
||||
F: include/dt-bindings/sound/
|
||||
F: include/sound/soc*
|
||||
|
||||
SOUNDWIRE SUBSYSTEM
|
||||
@ -15234,7 +15308,7 @@ F: arch/um/os-Linux/drivers/
|
||||
TURBOCHANNEL SUBSYSTEM
|
||||
M: "Maciej W. Rozycki" <macro@linux-mips.org>
|
||||
M: Ralf Baechle <ralf@linux-mips.org>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
Q: http://patchwork.linux-mips.org/project/linux-mips/list/
|
||||
S: Maintained
|
||||
F: drivers/tc/
|
||||
@ -16055,7 +16129,7 @@ F: drivers/net/vmxnet3/
|
||||
|
||||
VOCORE VOCORE2 BOARD
|
||||
M: Harvey Hunt <harveyhuntnexus@gmail.com>
|
||||
L: linux-mips@linux-mips.org
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/ralink/vocore2.dts
|
||||
|
||||
|
2
Makefile
2
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 20
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Shy Crocodile
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -109,7 +109,7 @@ endmenu
|
||||
|
||||
choice
|
||||
prompt "ARC Instruction Set"
|
||||
default ISA_ARCOMPACT
|
||||
default ISA_ARCV2
|
||||
|
||||
config ISA_ARCOMPACT
|
||||
bool "ARCompact ISA"
|
||||
@ -176,13 +176,11 @@ endchoice
|
||||
|
||||
config CPU_BIG_ENDIAN
|
||||
bool "Enable Big Endian Mode"
|
||||
default n
|
||||
help
|
||||
Build kernel for Big Endian Mode of ARC CPU
|
||||
|
||||
config SMP
|
||||
bool "Symmetric Multi-Processing"
|
||||
default n
|
||||
select ARC_MCIP if ISA_ARCV2
|
||||
help
|
||||
This enables support for systems with more than one CPU.
|
||||
@ -254,7 +252,6 @@ config ARC_CACHE_PAGES
|
||||
config ARC_CACHE_VIPT_ALIASING
|
||||
bool "Support VIPT Aliasing D$"
|
||||
depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
|
||||
default n
|
||||
|
||||
endif #ARC_CACHE
|
||||
|
||||
@ -262,7 +259,6 @@ config ARC_HAS_ICCM
|
||||
bool "Use ICCM"
|
||||
help
|
||||
Single Cycle RAMS to store Fast Path Code
|
||||
default n
|
||||
|
||||
config ARC_ICCM_SZ
|
||||
int "ICCM Size in KB"
|
||||
@ -273,7 +269,6 @@ config ARC_HAS_DCCM
|
||||
bool "Use DCCM"
|
||||
help
|
||||
Single Cycle RAMS to store Fast Path Data
|
||||
default n
|
||||
|
||||
config ARC_DCCM_SZ
|
||||
int "DCCM Size in KB"
|
||||
@ -366,13 +361,11 @@ if ISA_ARCOMPACT
|
||||
|
||||
config ARC_COMPACT_IRQ_LEVELS
|
||||
bool "Setup Timer IRQ as high Priority"
|
||||
default n
|
||||
# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
|
||||
depends on !SMP
|
||||
|
||||
config ARC_FPU_SAVE_RESTORE
|
||||
bool "Enable FPU state persistence across context switch"
|
||||
default n
|
||||
help
|
||||
Double Precision Floating Point unit had dedicated regs which
|
||||
need to be saved/restored across context-switch.
|
||||
@ -453,7 +446,6 @@ config HIGHMEM
|
||||
|
||||
config ARC_HAS_PAE40
|
||||
bool "Support for the 40-bit Physical Address Extension"
|
||||
default n
|
||||
depends on ISA_ARCV2
|
||||
select HIGHMEM
|
||||
select PHYS_ADDR_T_64BIT
|
||||
@ -496,7 +488,6 @@ config HZ
|
||||
|
||||
config ARC_METAWARE_HLINK
|
||||
bool "Support for Metaware debugger assisted Host access"
|
||||
default n
|
||||
help
|
||||
This options allows a Linux userland apps to directly access
|
||||
host file system (open/creat/read/write etc) with help from
|
||||
@ -524,13 +515,11 @@ config ARC_DW2_UNWIND
|
||||
|
||||
config ARC_DBG_TLB_PARANOIA
|
||||
bool "Paranoia Checks in Low Level TLB Handlers"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
||||
config ARC_UBOOT_SUPPORT
|
||||
bool "Support uboot arg Handling"
|
||||
default n
|
||||
help
|
||||
ARC Linux by default checks for uboot provided args as pointers to
|
||||
external cmdline or DTB. This however breaks in absence of uboot,
|
||||
|
@ -6,7 +6,7 @@
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
|
||||
KBUILD_DEFCONFIG := nsim_700_defconfig
|
||||
KBUILD_DEFCONFIG := nsim_hs_defconfig
|
||||
|
||||
cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
|
||||
cflags-$(CONFIG_ISA_ARCOMPACT) += -mA7
|
||||
|
@ -222,6 +222,21 @@
|
||||
bus-width = <4>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
gpio: gpio@3000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x3000 0x20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio_port_a: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <24>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
@ -14,6 +14,7 @@ CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
@ -95,6 +96,7 @@ CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -94,6 +94,7 @@ CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -97,6 +97,7 @@ CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -45,6 +45,9 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_DWAPB=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_DRM=y
|
||||
# CONFIG_DRM_FBDEV_EMULATION is not set
|
||||
@ -65,6 +68,7 @@ CONFIG_EXT3_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -15,6 +15,7 @@ CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
@ -73,6 +74,7 @@ CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -15,6 +15,7 @@ CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_LBDAF is not set
|
||||
|
@ -15,6 +15,7 @@ CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_LBDAF is not set
|
||||
@ -66,5 +67,6 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
|
@ -65,5 +65,6 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
|
@ -76,6 +76,7 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
CONFIG_FTRACE=y
|
||||
|
@ -19,6 +19,7 @@ CONFIG_KALLSYMS_ALL=y
|
||||
# CONFIG_AIO is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
|
@ -85,6 +85,7 @@ CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -90,6 +90,7 @@ CONFIG_NTFS_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
@ -113,7 +113,9 @@ extern unsigned long perip_base, perip_end;
|
||||
|
||||
/* IO coherency related Auxiliary registers */
|
||||
#define ARC_REG_IO_COH_ENABLE 0x500
|
||||
#define ARC_IO_COH_ENABLE_BIT BIT(0)
|
||||
#define ARC_REG_IO_COH_PARTIAL 0x501
|
||||
#define ARC_IO_COH_PARTIAL_BIT BIT(0)
|
||||
#define ARC_REG_IO_COH_AP0_BASE 0x508
|
||||
#define ARC_REG_IO_COH_AP0_SIZE 0x509
|
||||
|
||||
|
@ -12,6 +12,7 @@
|
||||
#include <linux/types.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
#include <asm/barrier.h>
|
||||
@ -94,6 +95,42 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
|
||||
return w;
|
||||
}
|
||||
|
||||
/*
|
||||
* {read,write}s{b,w,l}() repeatedly access the same IO address in
|
||||
* native endianness in 8-, 16-, 32-bit chunks {into,from} memory,
|
||||
* @count times
|
||||
*/
|
||||
#define __raw_readsx(t,f) \
|
||||
static inline void __raw_reads##f(const volatile void __iomem *addr, \
|
||||
void *ptr, unsigned int count) \
|
||||
{ \
|
||||
bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
|
||||
u##t *buf = ptr; \
|
||||
\
|
||||
if (!count) \
|
||||
return; \
|
||||
\
|
||||
/* Some ARC CPU's don't support unaligned accesses */ \
|
||||
if (is_aligned) { \
|
||||
do { \
|
||||
u##t x = __raw_read##f(addr); \
|
||||
*buf++ = x; \
|
||||
} while (--count); \
|
||||
} else { \
|
||||
do { \
|
||||
u##t x = __raw_read##f(addr); \
|
||||
put_unaligned(x, buf++); \
|
||||
} while (--count); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define __raw_readsb __raw_readsb
|
||||
__raw_readsx(8, b)
|
||||
#define __raw_readsw __raw_readsw
|
||||
__raw_readsx(16, w)
|
||||
#define __raw_readsl __raw_readsl
|
||||
__raw_readsx(32, l)
|
||||
|
||||
#define __raw_writeb __raw_writeb
|
||||
static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
|
||||
{
|
||||
@ -126,6 +163,35 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)
|
||||
|
||||
}
|
||||
|
||||
#define __raw_writesx(t,f) \
|
||||
static inline void __raw_writes##f(volatile void __iomem *addr, \
|
||||
const void *ptr, unsigned int count) \
|
||||
{ \
|
||||
bool is_aligned = ((unsigned long)ptr % ((t) / 8)) == 0; \
|
||||
const u##t *buf = ptr; \
|
||||
\
|
||||
if (!count) \
|
||||
return; \
|
||||
\
|
||||
/* Some ARC CPU's don't support unaligned accesses */ \
|
||||
if (is_aligned) { \
|
||||
do { \
|
||||
__raw_write##f(*buf++, addr); \
|
||||
} while (--count); \
|
||||
} else { \
|
||||
do { \
|
||||
__raw_write##f(get_unaligned(buf++), addr); \
|
||||
} while (--count); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define __raw_writesb __raw_writesb
|
||||
__raw_writesx(8, b)
|
||||
#define __raw_writesw __raw_writesw
|
||||
__raw_writesx(16, w)
|
||||
#define __raw_writesl __raw_writesl
|
||||
__raw_writesx(32, l)
|
||||
|
||||
/*
|
||||
* MMIO can also get buffered/optimized in micro-arch, so barriers needed
|
||||
* Based on ARM model for the typical use case
|
||||
@ -141,10 +207,16 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)
|
||||
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
|
||||
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
|
||||
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
|
||||
#define readsb(p,d,l) ({ __raw_readsb(p,d,l); __iormb(); })
|
||||
#define readsw(p,d,l) ({ __raw_readsw(p,d,l); __iormb(); })
|
||||
#define readsl(p,d,l) ({ __raw_readsl(p,d,l); __iormb(); })
|
||||
|
||||
#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
|
||||
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
|
||||
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
|
||||
#define writesb(p,d,l) ({ __iowmb(); __raw_writesb(p,d,l); })
|
||||
#define writesw(p,d,l) ({ __iowmb(); __raw_writesw(p,d,l); })
|
||||
#define writesl(p,d,l) ({ __iowmb(); __raw_writesl(p,d,l); })
|
||||
|
||||
/*
|
||||
* Relaxed API for drivers which can handle barrier ordering themselves
|
||||
|
@ -243,7 +243,7 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
||||
{
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
|
||||
struct bcr_identity *core = &cpu->core;
|
||||
int i, n = 0;
|
||||
int i, n = 0, ua = 0;
|
||||
|
||||
FIX_PTR(cpu);
|
||||
|
||||
@ -263,10 +263,13 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
||||
IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
|
||||
IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
|
||||
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
|
||||
#ifdef __ARC_UNALIGNED__
|
||||
ua = 1;
|
||||
#endif
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
|
||||
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
|
||||
IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
|
||||
IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
|
||||
IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
|
||||
|
||||
if (i)
|
||||
n += scnprintf(buf + n, len - n, "\n\t\t: ");
|
||||
|
@ -1144,6 +1144,20 @@ noinline void __init arc_ioc_setup(void)
|
||||
{
|
||||
unsigned int ioc_base, mem_sz;
|
||||
|
||||
/*
|
||||
* If IOC was already enabled (due to bootloader) it technically needs to
|
||||
* be reconfigured with aperture base,size corresponding to Linux memory map
|
||||
* which will certainly be different than uboot's. But disabling and
|
||||
* reenabling IOC when DMA might be potentially active is tricky business.
|
||||
* To avoid random memory issues later, just panic here and ask user to
|
||||
* upgrade bootloader to one which doesn't enable IOC
|
||||
*/
|
||||
if (read_aux_reg(ARC_REG_IO_COH_ENABLE) & ARC_IO_COH_ENABLE_BIT)
|
||||
panic("IOC already enabled, please upgrade bootloader!\n");
|
||||
|
||||
if (!ioc_enable)
|
||||
return;
|
||||
|
||||
/*
|
||||
* As for today we don't support both IOC and ZONE_HIGHMEM enabled
|
||||
* simultaneously. This happens because as of today IOC aperture covers
|
||||
@ -1187,8 +1201,8 @@ noinline void __init arc_ioc_setup(void)
|
||||
panic("IOC Aperture start must be aligned to the size of the aperture");
|
||||
|
||||
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, ioc_base >> 12);
|
||||
write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
|
||||
write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
|
||||
write_aux_reg(ARC_REG_IO_COH_PARTIAL, ARC_IO_COH_PARTIAL_BIT);
|
||||
write_aux_reg(ARC_REG_IO_COH_ENABLE, ARC_IO_COH_ENABLE_BIT);
|
||||
|
||||
/* Re-enable L1 dcache */
|
||||
__dc_enable();
|
||||
@ -1265,7 +1279,7 @@ void __init arc_cache_init_master(void)
|
||||
if (is_isa_arcv2() && l2_line_sz && !slc_enable)
|
||||
arc_slc_disable();
|
||||
|
||||
if (is_isa_arcv2() && ioc_enable)
|
||||
if (is_isa_arcv2() && ioc_exists)
|
||||
arc_ioc_setup();
|
||||
|
||||
if (is_isa_arcv2() && l2_line_sz && slc_enable) {
|
||||
|
@ -66,7 +66,7 @@ void do_page_fault(unsigned long address, struct pt_regs *regs)
|
||||
struct vm_area_struct *vma = NULL;
|
||||
struct task_struct *tsk = current;
|
||||
struct mm_struct *mm = tsk->mm;
|
||||
int si_code;
|
||||
int si_code = 0;
|
||||
int ret;
|
||||
vm_fault_t fault;
|
||||
int write = regs->ecr_cause & ECR_C_PROTV_STORE; /* ST/EX */
|
||||
|
@ -228,7 +228,7 @@
|
||||
vmmc-supply = <&vmmc_fixed>;
|
||||
bus-width = <4>;
|
||||
wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
|
||||
cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
|
||||
cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
@ -163,7 +163,7 @@
|
||||
compatible = "ti,wl1271";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */
|
||||
interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
tcxo-clock-frequency = <26000000>;
|
||||
};
|
||||
|
@ -492,12 +492,6 @@
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c04";
|
||||
pagesize = <16>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
hpa1: amp@60 {
|
||||
compatible = "ti,tpa6130a2";
|
||||
reg = <0x60>;
|
||||
|
@ -129,7 +129,7 @@
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
|
@ -35,7 +35,7 @@
|
||||
* jumpering combinations for the long run.
|
||||
*/
|
||||
&mmc3 {
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
|
||||
interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
|
||||
pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>;
|
||||
pinctrl-names = "default";
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
|
@ -10,7 +10,11 @@
|
||||
#include "rk3288.dtsi"
|
||||
|
||||
/ {
|
||||
memory@0 {
|
||||
/*
|
||||
* The default coreboot on veyron devices ignores memory@0 nodes
|
||||
* and would instead create another memory node.
|
||||
*/
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
@ -314,7 +314,7 @@
|
||||
0x1 0x0 0x60000000 0x10000000
|
||||
0x2 0x0 0x70000000 0x10000000
|
||||
0x3 0x0 0x80000000 0x10000000>;
|
||||
clocks = <&mck>;
|
||||
clocks = <&h32ck>;
|
||||
status = "disabled";
|
||||
|
||||
nand_controller: nand-controller {
|
||||
|
@ -183,9 +183,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
unsigned long frame_pointer)
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long) &return_to_handler;
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long old;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
@ -193,21 +191,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
old = *parent;
|
||||
*parent = return_hooker;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
if (function_graph_enter(old, self_addr, frame_pointer, NULL))
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, NULL);
|
||||
if (err == -EBUSY) {
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
|
@ -759,6 +759,8 @@ static struct davinci_id da830_ids[] = {
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data da830_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 128,
|
||||
};
|
||||
|
||||
|
@ -719,6 +719,8 @@ int __init da850_register_vpif_capture(struct vpif_capture_config
|
||||
}
|
||||
|
||||
static struct davinci_gpio_platform_data da850_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 144,
|
||||
};
|
||||
|
||||
|
@ -701,6 +701,46 @@ static struct resource da8xx_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DA8XX_GPIO0,
|
||||
.end = IRQ_DA8XX_GPIO0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO1,
|
||||
.end = IRQ_DA8XX_GPIO1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO2,
|
||||
.end = IRQ_DA8XX_GPIO2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO3,
|
||||
.end = IRQ_DA8XX_GPIO3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO4,
|
||||
.end = IRQ_DA8XX_GPIO4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO5,
|
||||
.end = IRQ_DA8XX_GPIO5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO6,
|
||||
.end = IRQ_DA8XX_GPIO6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO7,
|
||||
.end = IRQ_DA8XX_GPIO7,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DA8XX_GPIO8,
|
||||
.end = IRQ_DA8XX_GPIO8,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
|
@ -548,12 +548,44 @@ static struct resource dm355_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM355_GPIOBNK0,
|
||||
.end = IRQ_DM355_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK1,
|
||||
.end = IRQ_DM355_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK2,
|
||||
.end = IRQ_DM355_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK3,
|
||||
.end = IRQ_DM355_GPIOBNK3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK4,
|
||||
.end = IRQ_DM355_GPIOBNK4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK5,
|
||||
.end = IRQ_DM355_GPIOBNK5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM355_GPIOBNK6,
|
||||
.end = IRQ_DM355_GPIOBNK6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 104,
|
||||
};
|
||||
|
||||
|
@ -267,12 +267,49 @@ static struct resource dm365_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM365_GPIO0,
|
||||
.end = IRQ_DM365_GPIO0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO1,
|
||||
.end = IRQ_DM365_GPIO1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO2,
|
||||
.end = IRQ_DM365_GPIO2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO3,
|
||||
.end = IRQ_DM365_GPIO3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO4,
|
||||
.end = IRQ_DM365_GPIO4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO5,
|
||||
.end = IRQ_DM365_GPIO5,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO6,
|
||||
.end = IRQ_DM365_GPIO6,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM365_GPIO7,
|
||||
.end = IRQ_DM365_GPIO7,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 104,
|
||||
.gpio_unbanked = 8,
|
||||
};
|
||||
|
@ -492,12 +492,34 @@ static struct resource dm644_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_GPIOBNK0,
|
||||
.end = IRQ_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK1,
|
||||
.end = IRQ_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK2,
|
||||
.end = IRQ_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK3,
|
||||
.end = IRQ_GPIOBNK3,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_GPIOBNK4,
|
||||
.end = IRQ_GPIOBNK4,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 71,
|
||||
};
|
||||
|
||||
|
@ -442,12 +442,24 @@ static struct resource dm646x_gpio_resources[] = {
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DM646X_GPIOBNK0,
|
||||
.end = IRQ_DM646X_GPIOBNK0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM646X_GPIOBNK1,
|
||||
.end = IRQ_DM646X_GPIOBNK1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_DM646X_GPIOBNK2,
|
||||
.end = IRQ_DM646X_GPIOBNK2,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
|
||||
.no_auto_base = true,
|
||||
.base = 0,
|
||||
.ngpio = 43,
|
||||
};
|
||||
|
||||
|
@ -750,6 +750,9 @@ static void modem_pm(struct uart_port *port, unsigned int state, unsigned old)
|
||||
struct modem_private_data *priv = port->private_data;
|
||||
int ret;
|
||||
|
||||
if (!priv)
|
||||
return;
|
||||
|
||||
if (IS_ERR(priv->regulator))
|
||||
return;
|
||||
|
||||
|
@ -351,7 +351,7 @@ static void omap44xx_prm_reconfigure_io_chain(void)
|
||||
* to occur, WAKEUPENABLE bits must be set in the pad mux registers, and
|
||||
* omap44xx_prm_reconfigure_io_chain() must be called. No return value.
|
||||
*/
|
||||
static void __init omap44xx_prm_enable_io_wakeup(void)
|
||||
static void omap44xx_prm_enable_io_wakeup(void)
|
||||
{
|
||||
s32 inst = omap4_prmst_get_prm_dev_inst();
|
||||
|
||||
|
@ -360,14 +360,16 @@ v7_dma_inv_range:
|
||||
ALT_UP(W(nop))
|
||||
#endif
|
||||
mcrne p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
|
||||
addne r0, r0, r2
|
||||
|
||||
tst r1, r3
|
||||
bic r1, r1, r3
|
||||
mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D / U line
|
||||
1:
|
||||
mcr p15, 0, r0, c7, c6, 1 @ invalidate D / U line
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
1:
|
||||
mcrlo p15, 0, r0, c7, c6, 1 @ invalidate D / U line
|
||||
addlo r0, r0, r2
|
||||
cmplo r0, r1
|
||||
blo 1b
|
||||
dsb st
|
||||
ret lr
|
||||
|
@ -73,9 +73,11 @@
|
||||
/*
|
||||
* dcimvac: Invalidate data cache line by MVA to PoC
|
||||
*/
|
||||
.macro dcimvac, rt, tmp
|
||||
v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC
|
||||
.irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
|
||||
.macro dcimvac\c, rt, tmp
|
||||
v7m_cacheop \rt, \tmp, V7M_SCB_DCIMVAC, \c
|
||||
.endm
|
||||
.endr
|
||||
|
||||
/*
|
||||
* dccmvau: Clean data cache line by MVA to PoU
|
||||
@ -369,14 +371,16 @@ v7m_dma_inv_range:
|
||||
tst r0, r3
|
||||
bic r0, r0, r3
|
||||
dccimvacne r0, r3
|
||||
addne r0, r0, r2
|
||||
subne r3, r2, #1 @ restore r3, corrupted by v7m's dccimvac
|
||||
tst r1, r3
|
||||
bic r1, r1, r3
|
||||
dccimvacne r1, r3
|
||||
1:
|
||||
dcimvac r0, r3
|
||||
add r0, r0, r2
|
||||
cmp r0, r1
|
||||
1:
|
||||
dcimvaclo r0, r3
|
||||
addlo r0, r0, r2
|
||||
cmplo r0, r1
|
||||
blo 1b
|
||||
dsb st
|
||||
ret lr
|
||||
|
@ -829,7 +829,7 @@ static int __arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
|
||||
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
||||
unsigned long attrs)
|
||||
{
|
||||
int ret;
|
||||
int ret = -ENXIO;
|
||||
unsigned long nr_vma_pages = vma_pages(vma);
|
||||
unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
||||
unsigned long pfn = dma_to_pfn(dev, dma_addr);
|
||||
|
@ -274,6 +274,13 @@
|
||||
.endm
|
||||
|
||||
.macro define_processor_functions name:req, dabort:req, pabort:req, nommu=0, suspend=0, bugs=0
|
||||
/*
|
||||
* If we are building for big.Little with branch predictor hardening,
|
||||
* we need the processor function tables to remain available after boot.
|
||||
*/
|
||||
#if 1 // defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
.section ".rodata"
|
||||
#endif
|
||||
.type \name\()_processor_functions, #object
|
||||
.align 2
|
||||
ENTRY(\name\()_processor_functions)
|
||||
@ -309,6 +316,9 @@ ENTRY(\name\()_processor_functions)
|
||||
.endif
|
||||
|
||||
.size \name\()_processor_functions, . - \name\()_processor_functions
|
||||
#if 1 // defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
|
||||
.previous
|
||||
#endif
|
||||
.endm
|
||||
|
||||
.macro define_cache_functions name:req
|
||||
|
@ -247,7 +247,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *or
|
||||
}
|
||||
|
||||
/* Copy arch-dep-instance from template. */
|
||||
memcpy(code, &optprobe_template_entry,
|
||||
memcpy(code, (unsigned char *)optprobe_template_entry,
|
||||
TMPL_END_IDX * sizeof(kprobe_opcode_t));
|
||||
|
||||
/* Adjust buffer according to instruction. */
|
||||
|
@ -497,6 +497,24 @@ config ARM64_ERRATUM_1188873
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config ARM64_ERRATUM_1286807
|
||||
bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation"
|
||||
default y
|
||||
select ARM64_WORKAROUND_REPEAT_TLBI
|
||||
help
|
||||
This option adds workaround for ARM Cortex-A76 erratum 1286807
|
||||
|
||||
On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
|
||||
address for a cacheable mapping of a location is being
|
||||
accessed by a core while another core is remapping the virtual
|
||||
address to a new physical page using the recommended
|
||||
break-before-make sequence, then under very rare circumstances
|
||||
TLBI+DSB completes before a read using the translation being
|
||||
invalidated has been observed by other observers. The
|
||||
workaround repeats the TLBI+DSB operation.
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config CAVIUM_ERRATUM_22375
|
||||
bool "Cavium erratum 22375, 24313"
|
||||
default y
|
||||
@ -566,9 +584,16 @@ config QCOM_FALKOR_ERRATUM_1003
|
||||
is unchanged. Work around the erratum by invalidating the walk cache
|
||||
entries for the trampoline before entering the kernel proper.
|
||||
|
||||
config ARM64_WORKAROUND_REPEAT_TLBI
|
||||
bool
|
||||
help
|
||||
Enable the repeat TLBI workaround for Falkor erratum 1009 and
|
||||
Cortex-A76 erratum 1286807.
|
||||
|
||||
config QCOM_FALKOR_ERRATUM_1009
|
||||
bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
|
||||
default y
|
||||
select ARM64_WORKAROUND_REPEAT_TLBI
|
||||
help
|
||||
On Falkor v1, the CPU may prematurely complete a DSB following a
|
||||
TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation
|
||||
|
@ -241,3 +241,7 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <0 4>, <81 4>;
|
||||
};
|
||||
|
@ -343,6 +343,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
&gcc {
|
||||
protected-clocks = <GCC_QSPI_CORE_CLK>,
|
||||
<GCC_QSPI_CORE_CLK_SRC>,
|
||||
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
@ -352,6 +358,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tlmm {
|
||||
gpio-reserved-ranges = <0 4>, <81 4>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -153,7 +153,7 @@
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
|
||||
ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
num-lanes = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
||||
|
@ -57,18 +57,6 @@
|
||||
regulator-always-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
};
|
||||
|
||||
vdd_log: vdd-log {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm2 0 25000 0>;
|
||||
regulator-name = "vdd_log";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vcc_sys>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&cpu_l0 {
|
||||
|
@ -36,7 +36,7 @@
|
||||
|
||||
wkup_uart0: serial@42300000 {
|
||||
compatible = "ti,am654-uart";
|
||||
reg = <0x00 0x42300000 0x00 0x100>;
|
||||
reg = <0x42300000 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
@ -56,6 +56,19 @@ static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs)
|
||||
{
|
||||
return is_compat_task();
|
||||
}
|
||||
|
||||
#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
|
||||
|
||||
static inline bool arch_syscall_match_sym_name(const char *sym,
|
||||
const char *name)
|
||||
{
|
||||
/*
|
||||
* Since all syscall functions have __arm64_ prefix, we must skip it.
|
||||
* However, as we described above, we decided to ignore compat
|
||||
* syscalls, so we don't care about __arm64_compat_ prefix here.
|
||||
*/
|
||||
return !strcmp(sym + 8, name);
|
||||
}
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_FTRACE_H */
|
||||
|
@ -41,14 +41,14 @@
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op, \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009) \
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
|
||||
: : )
|
||||
|
||||
#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n" \
|
||||
ALTERNATIVE("nop\n nop", \
|
||||
"dsb ish\n tlbi " #op ", %0", \
|
||||
ARM64_WORKAROUND_REPEAT_TLBI, \
|
||||
CONFIG_QCOM_FALKOR_ERRATUM_1009) \
|
||||
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI) \
|
||||
: : "r" (arg))
|
||||
|
||||
#define __TLBI_N(op, arg, n, ...) __TLBI_##n(op, arg)
|
||||
|
@ -570,6 +570,20 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
|
||||
|
||||
static const struct midr_range arm64_repeat_tlbi_cpus[] = {
|
||||
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
|
||||
MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_1286807
|
||||
MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
|
||||
#endif
|
||||
{},
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
#if defined(CONFIG_ARM64_ERRATUM_826319) || \
|
||||
defined(CONFIG_ARM64_ERRATUM_827319) || \
|
||||
@ -695,11 +709,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
.matches = is_kryo_midr,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
|
||||
{
|
||||
.desc = "Qualcomm Technologies Falkor erratum 1009",
|
||||
.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
|
||||
.capability = ARM64_WORKAROUND_REPEAT_TLBI,
|
||||
ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0),
|
||||
ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_858921
|
||||
|
@ -216,8 +216,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long)&return_to_handler;
|
||||
unsigned long old;
|
||||
struct ftrace_graph_ent trace;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
@ -229,18 +227,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
*/
|
||||
old = *parent;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return;
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, NULL);
|
||||
if (err == -EBUSY)
|
||||
return;
|
||||
else
|
||||
if (!function_graph_enter(old, self_addr, frame_pointer, NULL))
|
||||
*parent = return_hooker;
|
||||
}
|
||||
|
||||
|
@ -214,7 +214,7 @@ static int create_safe_exec_page(void *src_start, size_t length,
|
||||
}
|
||||
|
||||
memcpy((void *)dst, src_start, length);
|
||||
flush_icache_range(dst, dst + length);
|
||||
__flush_icache_range(dst, dst + length);
|
||||
|
||||
pgdp = pgd_offset_raw(allocator(mask), dst_addr);
|
||||
if (pgd_none(READ_ONCE(*pgdp))) {
|
||||
|
@ -351,7 +351,8 @@ static void build_epilogue(struct jit_ctx *ctx)
|
||||
* >0 - successfully JITed a 16-byte eBPF instruction.
|
||||
* <0 - failed to JIT.
|
||||
*/
|
||||
static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
|
||||
bool extra_pass)
|
||||
{
|
||||
const u8 code = insn->code;
|
||||
const u8 dst = bpf2a64[insn->dst_reg];
|
||||
@ -625,12 +626,19 @@ emit_cond_jmp:
|
||||
case BPF_JMP | BPF_CALL:
|
||||
{
|
||||
const u8 r0 = bpf2a64[BPF_REG_0];
|
||||
const u64 func = (u64)__bpf_call_base + imm;
|
||||
bool func_addr_fixed;
|
||||
u64 func_addr;
|
||||
int ret;
|
||||
|
||||
if (ctx->prog->is_func)
|
||||
emit_addr_mov_i64(tmp, func, ctx);
|
||||
ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
|
||||
&func_addr, &func_addr_fixed);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (func_addr_fixed)
|
||||
/* We can use optimized emission here. */
|
||||
emit_a64_mov_i64(tmp, func_addr, ctx);
|
||||
else
|
||||
emit_a64_mov_i64(tmp, func, ctx);
|
||||
emit_addr_mov_i64(tmp, func_addr, ctx);
|
||||
emit(A64_BLR(tmp), ctx);
|
||||
emit(A64_MOV(1, r0, A64_R(0)), ctx);
|
||||
break;
|
||||
@ -753,7 +761,7 @@ emit_cond_jmp:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int build_body(struct jit_ctx *ctx)
|
||||
static int build_body(struct jit_ctx *ctx, bool extra_pass)
|
||||
{
|
||||
const struct bpf_prog *prog = ctx->prog;
|
||||
int i;
|
||||
@ -762,7 +770,7 @@ static int build_body(struct jit_ctx *ctx)
|
||||
const struct bpf_insn *insn = &prog->insnsi[i];
|
||||
int ret;
|
||||
|
||||
ret = build_insn(insn, ctx);
|
||||
ret = build_insn(insn, ctx, extra_pass);
|
||||
if (ret > 0) {
|
||||
i++;
|
||||
if (ctx->image == NULL)
|
||||
@ -858,7 +866,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
/* 1. Initial fake pass to compute ctx->idx. */
|
||||
|
||||
/* Fake pass to fill in ctx->offset. */
|
||||
if (build_body(&ctx)) {
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
@ -888,7 +896,7 @@ skip_init_ctx:
|
||||
|
||||
build_prologue(&ctx, was_classic);
|
||||
|
||||
if (build_body(&ctx)) {
|
||||
if (build_body(&ctx, extra_pass)) {
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
|
@ -16,7 +16,7 @@
|
||||
|
||||
static inline void tlbmiss_handler_setup_pgd(unsigned long pgd, bool kernel)
|
||||
{
|
||||
pgd &= ~(1<<31);
|
||||
pgd -= PAGE_OFFSET;
|
||||
pgd += PHYS_OFFSET;
|
||||
pgd |= 1;
|
||||
setup_pgd(pgd, kernel);
|
||||
@ -29,7 +29,7 @@ static inline void tlbmiss_handler_setup_pgd(unsigned long pgd, bool kernel)
|
||||
|
||||
static inline unsigned long tlb_get_pgd(void)
|
||||
{
|
||||
return ((get_pgd()|(1<<31)) - PHYS_OFFSET) & ~1;
|
||||
return ((get_pgd() - PHYS_OFFSET) & ~1) + PAGE_OFFSET;
|
||||
}
|
||||
|
||||
#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
|
||||
|
@ -59,7 +59,9 @@ extern struct node_cpuid_s node_cpuid[NR_CPUS];
|
||||
*/
|
||||
|
||||
extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
|
||||
#define node_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)])
|
||||
#define slit_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)])
|
||||
extern int __node_distance(int from, int to);
|
||||
#define node_distance(from,to) __node_distance(from, to)
|
||||
|
||||
extern int paddr_to_nid(unsigned long paddr);
|
||||
|
||||
|
@ -578,8 +578,8 @@ void __init acpi_numa_fixup(void)
|
||||
if (!slit_table) {
|
||||
for (i = 0; i < MAX_NUMNODES; i++)
|
||||
for (j = 0; j < MAX_NUMNODES; j++)
|
||||
node_distance(i, j) = i == j ? LOCAL_DISTANCE :
|
||||
REMOTE_DISTANCE;
|
||||
slit_distance(i, j) = i == j ?
|
||||
LOCAL_DISTANCE : REMOTE_DISTANCE;
|
||||
return;
|
||||
}
|
||||
|
||||
@ -592,7 +592,7 @@ void __init acpi_numa_fixup(void)
|
||||
if (!pxm_bit_test(j))
|
||||
continue;
|
||||
node_to = pxm_to_node(j);
|
||||
node_distance(node_from, node_to) =
|
||||
slit_distance(node_from, node_to) =
|
||||
slit_table->entry[i * slit_table->locality_count + j];
|
||||
}
|
||||
}
|
||||
|
@ -36,6 +36,12 @@ struct node_cpuid_s node_cpuid[NR_CPUS] =
|
||||
*/
|
||||
u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
|
||||
|
||||
int __node_distance(int from, int to)
|
||||
{
|
||||
return slit_distance(from, to);
|
||||
}
|
||||
EXPORT_SYMBOL(__node_distance);
|
||||
|
||||
/* Identify which cnode a physical address resides on */
|
||||
int
|
||||
paddr_to_nid(unsigned long paddr)
|
||||
|
@ -22,8 +22,7 @@
|
||||
void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
{
|
||||
unsigned long old;
|
||||
int faulted, err;
|
||||
struct ftrace_graph_ent trace;
|
||||
int faulted;
|
||||
unsigned long return_hooker = (unsigned long)
|
||||
&return_to_handler;
|
||||
|
||||
@ -63,18 +62,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
return;
|
||||
}
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0, NULL);
|
||||
if (err == -EBUSY) {
|
||||
if (function_graph_enter(old, self_addr, 0, NULL))
|
||||
*parent = old;
|
||||
return;
|
||||
}
|
||||
|
||||
trace.func = self_addr;
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
current->curr_ret_stack--;
|
||||
*parent = old;
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
|
||||
|
||||
|
@ -73,7 +73,7 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
|
||||
#ifdef CONFIG_64BIT
|
||||
case 4: case 5: case 6: case 7:
|
||||
#ifdef CONFIG_MIPS32_O32
|
||||
if (test_thread_flag(TIF_32BIT_REGS))
|
||||
if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
|
||||
return get_user(*arg, (int *)usp + n);
|
||||
else
|
||||
#endif
|
||||
|
@ -322,7 +322,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
unsigned long fp)
|
||||
{
|
||||
unsigned long old_parent_ra;
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long return_hooker = (unsigned long)
|
||||
&return_to_handler;
|
||||
int faulted, insns;
|
||||
@ -369,12 +368,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
if (unlikely(faulted))
|
||||
goto out;
|
||||
|
||||
if (ftrace_push_return_trace(old_parent_ra, self_ra, &trace.depth, fp,
|
||||
NULL) == -EBUSY) {
|
||||
*parent_ra_addr = old_parent_ra;
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Get the recorded ip of the current mcount calling site in the
|
||||
* __mcount_loc section, which will be used to filter the function
|
||||
@ -382,13 +375,10 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
|
||||
*/
|
||||
|
||||
insns = core_kernel_text(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1;
|
||||
trace.func = self_ra - (MCOUNT_INSN_SIZE * insns);
|
||||
self_ra -= (MCOUNT_INSN_SIZE * insns);
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
current->curr_ret_stack--;
|
||||
if (function_graph_enter(old_parent_ra, self_ra, fp, NULL))
|
||||
*parent_ra_addr = old_parent_ra;
|
||||
}
|
||||
return;
|
||||
out:
|
||||
ftrace_graph_stop();
|
||||
|
@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
|
||||
};
|
||||
static struct rt2880_pmx_func nd_sd_grp[] = {
|
||||
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
|
||||
FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
|
||||
FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
|
||||
};
|
||||
|
||||
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
|
||||
|
@ -211,28 +211,14 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
unsigned long frame_pointer)
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long)&return_to_handler;
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long old;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return;
|
||||
|
||||
old = *parent;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return;
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, NULL);
|
||||
|
||||
if (err == -EBUSY)
|
||||
return;
|
||||
|
||||
if (!function_graph_enter(old, self_addr, frame_pointer, NULL))
|
||||
*parent = return_hooker;
|
||||
}
|
||||
|
||||
|
@ -71,6 +71,13 @@ ifdef CONFIG_MLONGCALLS
|
||||
KBUILD_CFLAGS_KERNEL += -mlong-calls
|
||||
endif
|
||||
|
||||
# Without this, "ld -r" results in .text sections that are too big (> 0x40000)
|
||||
# for branches to reach stubs. And multiple .text sections trigger a warning
|
||||
# when creating the sysfs module information section.
|
||||
ifndef CONFIG_64BIT
|
||||
KBUILD_CFLAGS_MODULE += -ffunction-sections
|
||||
endif
|
||||
|
||||
# select which processor to optimise for
|
||||
cflags-$(CONFIG_PA7000) += -march=1.1 -mschedule=7100
|
||||
cflags-$(CONFIG_PA7200) += -march=1.1 -mschedule=7200
|
||||
|
@ -30,7 +30,6 @@ static void __hot prepare_ftrace_return(unsigned long *parent,
|
||||
unsigned long self_addr)
|
||||
{
|
||||
unsigned long old;
|
||||
struct ftrace_graph_ent trace;
|
||||
extern int parisc_return_to_handler;
|
||||
|
||||
if (unlikely(ftrace_graph_is_dead()))
|
||||
@ -41,17 +40,7 @@ static void __hot prepare_ftrace_return(unsigned long *parent,
|
||||
|
||||
old = *parent;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return;
|
||||
|
||||
if (ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
0, NULL) == -EBUSY)
|
||||
return;
|
||||
|
||||
if (!function_graph_enter(old, self_addr, 0, NULL))
|
||||
/* activate parisc_return_to_handler() as return point */
|
||||
*parent = (unsigned long) &parisc_return_to_handler;
|
||||
}
|
||||
|
@ -950,7 +950,6 @@ int ftrace_disable_ftrace_graph_caller(void)
|
||||
*/
|
||||
unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
|
||||
{
|
||||
struct ftrace_graph_ent trace;
|
||||
unsigned long return_hooker;
|
||||
|
||||
if (unlikely(ftrace_graph_is_dead()))
|
||||
@ -961,17 +960,7 @@ unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
|
||||
|
||||
return_hooker = ppc_function_entry(return_to_handler);
|
||||
|
||||
trace.func = ip;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
goto out;
|
||||
|
||||
if (ftrace_push_return_trace(parent, ip, &trace.depth, 0,
|
||||
NULL) == -EBUSY)
|
||||
goto out;
|
||||
|
||||
if (!function_graph_enter(parent, ip, 0, NULL))
|
||||
parent = return_hooker;
|
||||
out:
|
||||
return parent;
|
||||
|
@ -983,6 +983,7 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
|
||||
ret = kvmhv_enter_nested_guest(vcpu);
|
||||
if (ret == H_INTERRUPT) {
|
||||
kvmppc_set_gpr(vcpu, 3, 0);
|
||||
vcpu->arch.hcall_needed = 0;
|
||||
return -EINTR;
|
||||
}
|
||||
break;
|
||||
|
@ -166,7 +166,33 @@ static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
|
||||
PPC_BLR();
|
||||
}
|
||||
|
||||
static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func)
|
||||
static void bpf_jit_emit_func_call_hlp(u32 *image, struct codegen_context *ctx,
|
||||
u64 func)
|
||||
{
|
||||
#ifdef PPC64_ELF_ABI_v1
|
||||
/* func points to the function descriptor */
|
||||
PPC_LI64(b2p[TMP_REG_2], func);
|
||||
/* Load actual entry point from function descriptor */
|
||||
PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_2], 0);
|
||||
/* ... and move it to LR */
|
||||
PPC_MTLR(b2p[TMP_REG_1]);
|
||||
/*
|
||||
* Load TOC from function descriptor at offset 8.
|
||||
* We can clobber r2 since we get called through a
|
||||
* function pointer (so caller will save/restore r2)
|
||||
* and since we don't use a TOC ourself.
|
||||
*/
|
||||
PPC_BPF_LL(2, b2p[TMP_REG_2], 8);
|
||||
#else
|
||||
/* We can clobber r12 */
|
||||
PPC_FUNC_ADDR(12, func);
|
||||
PPC_MTLR(12);
|
||||
#endif
|
||||
PPC_BLRL();
|
||||
}
|
||||
|
||||
static void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx,
|
||||
u64 func)
|
||||
{
|
||||
unsigned int i, ctx_idx = ctx->idx;
|
||||
|
||||
@ -273,7 +299,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
|
||||
{
|
||||
const struct bpf_insn *insn = fp->insnsi;
|
||||
int flen = fp->len;
|
||||
int i;
|
||||
int i, ret;
|
||||
|
||||
/* Start of epilogue code - will only be valid 2nd pass onwards */
|
||||
u32 exit_addr = addrs[flen];
|
||||
@ -284,8 +310,9 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
|
||||
u32 src_reg = b2p[insn[i].src_reg];
|
||||
s16 off = insn[i].off;
|
||||
s32 imm = insn[i].imm;
|
||||
bool func_addr_fixed;
|
||||
u64 func_addr;
|
||||
u64 imm64;
|
||||
u8 *func;
|
||||
u32 true_cond;
|
||||
u32 tmp_idx;
|
||||
|
||||
@ -711,23 +738,15 @@ emit_clear:
|
||||
case BPF_JMP | BPF_CALL:
|
||||
ctx->seen |= SEEN_FUNC;
|
||||
|
||||
/* bpf function call */
|
||||
if (insn[i].src_reg == BPF_PSEUDO_CALL)
|
||||
if (!extra_pass)
|
||||
func = NULL;
|
||||
else if (fp->aux->func && off < fp->aux->func_cnt)
|
||||
/* use the subprog id from the off
|
||||
* field to lookup the callee address
|
||||
*/
|
||||
func = (u8 *) fp->aux->func[off]->bpf_func;
|
||||
else
|
||||
return -EINVAL;
|
||||
/* kernel helper call */
|
||||
else
|
||||
func = (u8 *) __bpf_call_base + imm;
|
||||
|
||||
bpf_jit_emit_func_call(image, ctx, (u64)func);
|
||||
ret = bpf_jit_get_func_addr(fp, &insn[i], extra_pass,
|
||||
&func_addr, &func_addr_fixed);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (func_addr_fixed)
|
||||
bpf_jit_emit_func_call_hlp(image, ctx, func_addr);
|
||||
else
|
||||
bpf_jit_emit_func_call_rel(image, ctx, func_addr);
|
||||
/* move return value from r3 to BPF_REG_0 */
|
||||
PPC_MR(b2p[BPF_REG_0], 3);
|
||||
break;
|
||||
@ -872,6 +891,55 @@ cond_branch:
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Fix the branch target addresses for subprog calls */
|
||||
static int bpf_jit_fixup_subprog_calls(struct bpf_prog *fp, u32 *image,
|
||||
struct codegen_context *ctx, u32 *addrs)
|
||||
{
|
||||
const struct bpf_insn *insn = fp->insnsi;
|
||||
bool func_addr_fixed;
|
||||
u64 func_addr;
|
||||
u32 tmp_idx;
|
||||
int i, ret;
|
||||
|
||||
for (i = 0; i < fp->len; i++) {
|
||||
/*
|
||||
* During the extra pass, only the branch target addresses for
|
||||
* the subprog calls need to be fixed. All other instructions
|
||||
* can left untouched.
|
||||
*
|
||||
* The JITed image length does not change because we already
|
||||
* ensure that the JITed instruction sequence for these calls
|
||||
* are of fixed length by padding them with NOPs.
|
||||
*/
|
||||
if (insn[i].code == (BPF_JMP | BPF_CALL) &&
|
||||
insn[i].src_reg == BPF_PSEUDO_CALL) {
|
||||
ret = bpf_jit_get_func_addr(fp, &insn[i], true,
|
||||
&func_addr,
|
||||
&func_addr_fixed);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Save ctx->idx as this would currently point to the
|
||||
* end of the JITed image and set it to the offset of
|
||||
* the instruction sequence corresponding to the
|
||||
* subprog call temporarily.
|
||||
*/
|
||||
tmp_idx = ctx->idx;
|
||||
ctx->idx = addrs[i] / 4;
|
||||
bpf_jit_emit_func_call_rel(image, ctx, func_addr);
|
||||
|
||||
/*
|
||||
* Restore ctx->idx here. This is safe as the length
|
||||
* of the JITed sequence remains unchanged.
|
||||
*/
|
||||
ctx->idx = tmp_idx;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct powerpc64_jit_data {
|
||||
struct bpf_binary_header *header;
|
||||
u32 *addrs;
|
||||
@ -970,6 +1038,22 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
|
||||
skip_init_ctx:
|
||||
code_base = (u32 *)(image + FUNCTION_DESCR_SIZE);
|
||||
|
||||
if (extra_pass) {
|
||||
/*
|
||||
* Do not touch the prologue and epilogue as they will remain
|
||||
* unchanged. Only fix the branch target address for subprog
|
||||
* calls in the body.
|
||||
*
|
||||
* This does not change the offsets and lengths of the subprog
|
||||
* call instruction sequences and hence, the size of the JITed
|
||||
* image as well.
|
||||
*/
|
||||
bpf_jit_fixup_subprog_calls(fp, code_base, &cgctx, addrs);
|
||||
|
||||
/* There is no need to perform the usual passes. */
|
||||
goto skip_codegen_passes;
|
||||
}
|
||||
|
||||
/* Code generation passes 1-2 */
|
||||
for (pass = 1; pass < 3; pass++) {
|
||||
/* Now build the prologue, body code & epilogue for real. */
|
||||
@ -983,6 +1067,7 @@ skip_init_ctx:
|
||||
proglen - (cgctx.idx * 4), cgctx.seen);
|
||||
}
|
||||
|
||||
skip_codegen_passes:
|
||||
if (bpf_jit_enable > 1)
|
||||
/*
|
||||
* Note that we output the base address of the code_base
|
||||
|
@ -132,7 +132,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long)&return_to_handler;
|
||||
unsigned long old;
|
||||
struct ftrace_graph_ent trace;
|
||||
int err;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
@ -144,16 +143,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
|
||||
*/
|
||||
old = *parent;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return;
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth,
|
||||
frame_pointer, parent);
|
||||
if (err == -EBUSY)
|
||||
return;
|
||||
if (function_graph_enter(old, self_addr, frame_pointer, parent))
|
||||
*parent = return_hooker;
|
||||
}
|
||||
|
||||
|
@ -203,21 +203,12 @@ device_initcall(ftrace_plt_init);
|
||||
*/
|
||||
unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
|
||||
{
|
||||
struct ftrace_graph_ent trace;
|
||||
|
||||
if (unlikely(ftrace_graph_is_dead()))
|
||||
goto out;
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
goto out;
|
||||
ip -= MCOUNT_INSN_SIZE;
|
||||
trace.func = ip;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
/* Only trace if the calling function expects to. */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
goto out;
|
||||
if (ftrace_push_return_trace(parent, ip, &trace.depth, 0,
|
||||
NULL) == -EBUSY)
|
||||
goto out;
|
||||
if (!function_graph_enter(parent, ip, 0, NULL))
|
||||
parent = (unsigned long) return_to_handler;
|
||||
out:
|
||||
return parent;
|
||||
|
@ -346,6 +346,8 @@ static int __hw_perf_event_init(struct perf_event *event)
|
||||
break;
|
||||
|
||||
case PERF_TYPE_HARDWARE:
|
||||
if (is_sampling_event(event)) /* No sampling support */
|
||||
return -ENOENT;
|
||||
ev = attr->config;
|
||||
/* Count user space (problem-state) only */
|
||||
if (!attr->exclude_user && attr->exclude_kernel) {
|
||||
|
@ -131,6 +131,7 @@ void crst_table_downgrade(struct mm_struct *mm)
|
||||
}
|
||||
|
||||
pgd = mm->pgd;
|
||||
mm_dec_nr_pmds(mm);
|
||||
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
|
||||
mm->context.asce_limit = _REGION3_SIZE;
|
||||
mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
|
||||
|
@ -321,8 +321,7 @@ int ftrace_disable_ftrace_graph_caller(void)
|
||||
void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
{
|
||||
unsigned long old;
|
||||
int faulted, err;
|
||||
struct ftrace_graph_ent trace;
|
||||
int faulted;
|
||||
unsigned long return_hooker = (unsigned long)&return_to_handler;
|
||||
|
||||
if (unlikely(ftrace_graph_is_dead()))
|
||||
@ -365,18 +364,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
|
||||
return;
|
||||
}
|
||||
|
||||
err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0, NULL);
|
||||
if (err == -EBUSY) {
|
||||
if (function_graph_enter(old, self_addr, 0, NULL))
|
||||
__raw_writel(old, parent);
|
||||
return;
|
||||
}
|
||||
|
||||
trace.func = self_addr;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace)) {
|
||||
current->curr_ret_stack--;
|
||||
__raw_writel(old, parent);
|
||||
}
|
||||
}
|
||||
#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
|
||||
|
@ -126,20 +126,11 @@ unsigned long prepare_ftrace_return(unsigned long parent,
|
||||
unsigned long frame_pointer)
|
||||
{
|
||||
unsigned long return_hooker = (unsigned long) &return_to_handler;
|
||||
struct ftrace_graph_ent trace;
|
||||
|
||||
if (unlikely(atomic_read(¤t->tracing_graph_pause)))
|
||||
return parent + 8UL;
|
||||
|
||||
trace.func = self_addr;
|
||||
trace.depth = current->curr_ret_stack + 1;
|
||||
|
||||
/* Only trace if the calling function expects to */
|
||||
if (!ftrace_graph_entry(&trace))
|
||||
return parent + 8UL;
|
||||
|
||||
if (ftrace_push_return_trace(parent, self_addr, &trace.depth,
|
||||
frame_pointer, NULL) == -EBUSY)
|
||||
if (function_graph_enter(parent, self_addr, frame_pointer, NULL))
|
||||
return parent + 8UL;
|
||||
|
||||
return return_hooker;
|
||||
|
@ -108,10 +108,9 @@ int iommu_table_init(struct iommu *iommu, int tsbsize,
|
||||
/* Allocate and initialize the free area map. */
|
||||
sz = num_tsb_entries / 8;
|
||||
sz = (sz + 7UL) & ~7UL;
|
||||
iommu->tbl.map = kmalloc_node(sz, GFP_KERNEL, numa_node);
|
||||
iommu->tbl.map = kzalloc_node(sz, GFP_KERNEL, numa_node);
|
||||
if (!iommu->tbl.map)
|
||||
return -ENOMEM;
|
||||
memset(iommu->tbl.map, 0, sz);
|
||||
|
||||
iommu_tbl_pool_init(&iommu->tbl, num_tsb_entries, IO_PAGE_SHIFT,
|
||||
(tlb_type != hypervisor ? iommu_flushall : NULL),
|
||||
|
@ -683,6 +683,7 @@ void do_signal32(struct pt_regs * regs)
|
||||
regs->tpc -= 4;
|
||||
regs->tnpc -= 4;
|
||||
pt_regs_clear_syscall(regs);
|
||||
/* fall through */
|
||||
case ERESTART_RESTARTBLOCK:
|
||||
regs->u_regs[UREG_G1] = __NR_restart_syscall;
|
||||
regs->tpc -= 4;
|
||||
|
@ -508,6 +508,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
|
||||
regs->pc -= 4;
|
||||
regs->npc -= 4;
|
||||
pt_regs_clear_syscall(regs);
|
||||
/* fall through */
|
||||
case ERESTART_RESTARTBLOCK:
|
||||
regs->u_regs[UREG_G1] = __NR_restart_syscall;
|
||||
regs->pc -= 4;
|
||||
|
@ -533,6 +533,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
|
||||
regs->tpc -= 4;
|
||||
regs->tnpc -= 4;
|
||||
pt_regs_clear_syscall(regs);
|
||||
/* fall through */
|
||||
case ERESTART_RESTARTBLOCK:
|
||||
regs->u_regs[UREG_G1] = __NR_restart_syscall;
|
||||
regs->tpc -= 4;
|
||||
|
@ -791,7 +791,7 @@ static int emit_compare_and_branch(const u8 code, const u8 dst, u8 src,
|
||||
}
|
||||
|
||||
/* Just skip the save instruction and the ctx register move. */
|
||||
#define BPF_TAILCALL_PROLOGUE_SKIP 16
|
||||
#define BPF_TAILCALL_PROLOGUE_SKIP 32
|
||||
#define BPF_TAILCALL_CNT_SP_OFF (STACK_BIAS + 128)
|
||||
|
||||
static void build_prologue(struct jit_ctx *ctx)
|
||||
@ -824,9 +824,15 @@ static void build_prologue(struct jit_ctx *ctx)
|
||||
const u8 vfp = bpf2sparc[BPF_REG_FP];
|
||||
|
||||
emit(ADD | IMMED | RS1(FP) | S13(STACK_BIAS) | RD(vfp), ctx);
|
||||
} else {
|
||||
emit_nop(ctx);
|
||||
}
|
||||
|
||||
emit_reg_move(I0, O0, ctx);
|
||||
emit_reg_move(I1, O1, ctx);
|
||||
emit_reg_move(I2, O2, ctx);
|
||||
emit_reg_move(I3, O3, ctx);
|
||||
emit_reg_move(I4, O4, ctx);
|
||||
/* If you add anything here, adjust BPF_TAILCALL_PROLOGUE_SKIP above. */
|
||||
}
|
||||
|
||||
@ -1270,6 +1276,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||
u32 opcode = 0, rs2;
|
||||
|
||||
if (insn->dst_reg == BPF_REG_FP)
|
||||
ctx->saw_frame_pointer = true;
|
||||
|
||||
ctx->tmp_2_used = true;
|
||||
emit_loadimm(imm, tmp2, ctx);
|
||||
|
||||
@ -1308,6 +1317,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
const u8 tmp = bpf2sparc[TMP_REG_1];
|
||||
u32 opcode = 0, rs2;
|
||||
|
||||
if (insn->dst_reg == BPF_REG_FP)
|
||||
ctx->saw_frame_pointer = true;
|
||||
|
||||
switch (BPF_SIZE(code)) {
|
||||
case BPF_W:
|
||||
opcode = ST32;
|
||||
@ -1340,6 +1352,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
||||
|
||||
if (insn->dst_reg == BPF_REG_FP)
|
||||
ctx->saw_frame_pointer = true;
|
||||
|
||||
ctx->tmp_1_used = true;
|
||||
ctx->tmp_2_used = true;
|
||||
ctx->tmp_3_used = true;
|
||||
@ -1360,6 +1375,9 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
|
||||
const u8 tmp2 = bpf2sparc[TMP_REG_2];
|
||||
const u8 tmp3 = bpf2sparc[TMP_REG_3];
|
||||
|
||||
if (insn->dst_reg == BPF_REG_FP)
|
||||
ctx->saw_frame_pointer = true;
|
||||
|
||||
ctx->tmp_1_used = true;
|
||||
ctx->tmp_2_used = true;
|
||||
ctx->tmp_3_used = true;
|
||||
@ -1425,12 +1443,12 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
struct bpf_prog *tmp, *orig_prog = prog;
|
||||
struct sparc64_jit_data *jit_data;
|
||||
struct bpf_binary_header *header;
|
||||
u32 prev_image_size, image_size;
|
||||
bool tmp_blinded = false;
|
||||
bool extra_pass = false;
|
||||
struct jit_ctx ctx;
|
||||
u32 image_size;
|
||||
u8 *image_ptr;
|
||||
int pass;
|
||||
int pass, i;
|
||||
|
||||
if (!prog->jit_requested)
|
||||
return orig_prog;
|
||||
@ -1461,28 +1479,53 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
header = jit_data->header;
|
||||
extra_pass = true;
|
||||
image_size = sizeof(u32) * ctx.idx;
|
||||
prev_image_size = image_size;
|
||||
pass = 1;
|
||||
goto skip_init_ctx;
|
||||
}
|
||||
|
||||
memset(&ctx, 0, sizeof(ctx));
|
||||
ctx.prog = prog;
|
||||
|
||||
ctx.offset = kcalloc(prog->len, sizeof(unsigned int), GFP_KERNEL);
|
||||
ctx.offset = kmalloc_array(prog->len, sizeof(unsigned int), GFP_KERNEL);
|
||||
if (ctx.offset == NULL) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
|
||||
/* Fake pass to detect features used, and get an accurate assessment
|
||||
* of what the final image size will be.
|
||||
/* Longest sequence emitted is for bswap32, 12 instructions. Pre-cook
|
||||
* the offset array so that we converge faster.
|
||||
*/
|
||||
for (i = 0; i < prog->len; i++)
|
||||
ctx.offset[i] = i * (12 * 4);
|
||||
|
||||
prev_image_size = ~0U;
|
||||
for (pass = 1; pass < 40; pass++) {
|
||||
ctx.idx = 0;
|
||||
|
||||
build_prologue(&ctx);
|
||||
if (build_body(&ctx)) {
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
build_prologue(&ctx);
|
||||
build_epilogue(&ctx);
|
||||
|
||||
if (bpf_jit_enable > 1)
|
||||
pr_info("Pass %d: size = %u, seen = [%c%c%c%c%c%c]\n", pass,
|
||||
ctx.idx * 4,
|
||||
ctx.tmp_1_used ? '1' : ' ',
|
||||
ctx.tmp_2_used ? '2' : ' ',
|
||||
ctx.tmp_3_used ? '3' : ' ',
|
||||
ctx.saw_frame_pointer ? 'F' : ' ',
|
||||
ctx.saw_call ? 'C' : ' ',
|
||||
ctx.saw_tail_call ? 'T' : ' ');
|
||||
|
||||
if (ctx.idx * 4 == prev_image_size)
|
||||
break;
|
||||
prev_image_size = ctx.idx * 4;
|
||||
cond_resched();
|
||||
}
|
||||
|
||||
/* Now we know the actual image size. */
|
||||
image_size = sizeof(u32) * ctx.idx;
|
||||
header = bpf_jit_binary_alloc(image_size, &image_ptr,
|
||||
@ -1494,7 +1537,6 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
|
||||
|
||||
ctx.image = (u32 *)image_ptr;
|
||||
skip_init_ctx:
|
||||
for (pass = 1; pass < 3; pass++) {
|
||||
ctx.idx = 0;
|
||||
|
||||
build_prologue(&ctx);
|
||||
@ -1507,15 +1549,12 @@ skip_init_ctx:
|
||||
|
||||
build_epilogue(&ctx);
|
||||
|
||||
if (bpf_jit_enable > 1)
|
||||
pr_info("Pass %d: shrink = %d, seen = [%c%c%c%c%c%c]\n", pass,
|
||||
image_size - (ctx.idx * 4),
|
||||
ctx.tmp_1_used ? '1' : ' ',
|
||||
ctx.tmp_2_used ? '2' : ' ',
|
||||
ctx.tmp_3_used ? '3' : ' ',
|
||||
ctx.saw_frame_pointer ? 'F' : ' ',
|
||||
ctx.saw_call ? 'C' : ' ',
|
||||
ctx.saw_tail_call ? 'T' : ' ');
|
||||
if (ctx.idx * 4 != prev_image_size) {
|
||||
pr_err("bpf_jit: Failed to converge, prev_size=%u size=%d\n",
|
||||
prev_image_size, ctx.idx * 4);
|
||||
bpf_jit_binary_free(header);
|
||||
prog = orig_prog;
|
||||
goto out_off;
|
||||
}
|
||||
|
||||
if (bpf_jit_enable > 1)
|
||||
|
@ -444,10 +444,6 @@ config RETPOLINE
|
||||
branches. Requires a compiler with -mindirect-branch=thunk-extern
|
||||
support for full protection. The kernel may run slower.
|
||||
|
||||
Without compiler support, at least indirect branches in assembler
|
||||
code are eliminated. Since this includes the syscall entry path,
|
||||
it is not entirely pointless.
|
||||
|
||||
config INTEL_RDT
|
||||
bool "Intel Resource Director Technology support"
|
||||
depends on X86 && CPU_SUP_INTEL
|
||||
@ -1004,13 +1000,7 @@ config NR_CPUS
|
||||
to the kernel image.
|
||||
|
||||
config SCHED_SMT
|
||||
bool "SMT (Hyperthreading) scheduler support"
|
||||
depends on SMP
|
||||
---help---
|
||||
SMT scheduler support improves the CPU scheduler's decision making
|
||||
when dealing with Intel Pentium 4 chips with HyperThreading at a
|
||||
cost of slightly increased overhead in some places. If unsure say
|
||||
N here.
|
||||
def_bool y if SMP
|
||||
|
||||
config SCHED_MC
|
||||
def_bool y
|
||||
|
@ -220,9 +220,7 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
|
||||
|
||||
# Avoid indirect branches in kernel to deal with Spectre
|
||||
ifdef CONFIG_RETPOLINE
|
||||
ifneq ($(RETPOLINE_CFLAGS),)
|
||||
KBUILD_CFLAGS += $(RETPOLINE_CFLAGS) -DRETPOLINE
|
||||
endif
|
||||
KBUILD_CFLAGS += $(RETPOLINE_CFLAGS)
|
||||
endif
|
||||
|
||||
archscripts: scripts_basic
|
||||
@ -306,6 +304,13 @@ ifndef CC_HAVE_ASM_GOTO
|
||||
@echo Compiler lacks asm-goto support.
|
||||
@exit 1
|
||||
endif
|
||||
ifdef CONFIG_RETPOLINE
|
||||
ifeq ($(RETPOLINE_CFLAGS),)
|
||||
@echo "You are building kernel with non-retpoline compiler." >&2
|
||||
@echo "Please update your compiler." >&2
|
||||
@false
|
||||
endif
|
||||
endif
|
||||
|
||||
archclean:
|
||||
$(Q)rm -rf $(objtree)/arch/i386
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user