mirror of
https://github.com/torvalds/linux.git
synced 2024-12-27 13:22:23 +00:00
soc: sifive: ccache: Add StarFive JH7110 support
This adds support for the StarFive JH7110 SoC which also features this SiFive cache controller. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
parent
1caf002efa
commit
6635e91648
@ -27,7 +27,7 @@ obj-y += qcom/
|
||||
obj-y += renesas/
|
||||
obj-y += rockchip/
|
||||
obj-$(CONFIG_SOC_SAMSUNG) += samsung/
|
||||
obj-$(CONFIG_SOC_SIFIVE) += sifive/
|
||||
obj-y += sifive/
|
||||
obj-y += sunxi/
|
||||
obj-$(CONFIG_ARCH_TEGRA) += tegra/
|
||||
obj-y += ti/
|
||||
|
@ -1,6 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
if SOC_SIFIVE
|
||||
if SOC_SIFIVE || SOC_STARFIVE
|
||||
|
||||
config SIFIVE_CCACHE
|
||||
bool "Sifive Composable Cache controller"
|
||||
|
Loading…
Reference in New Issue
Block a user