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ath9k_hw: move LowPower array writes to ar9003_hw_configpcipowersave()

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The LowPower array writes disables the PLL when ASPM is enabled.
The host driver makes quite a few calls to ath9k_hw_configpcipowersave()
and these same calls also need to ensure the PLL is off when they issue
it.

Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez 2010-06-21 18:38:48 -04:00 committed by John W. Linville
parent 9a658d2b5c
commit 653fe37122
2 changed files with 14 additions and 14 deletions
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14
drivers/net/wireless/ath/ath9k/ar9003_hw.c
View File

@ -298,6 +298,20 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
else
REG_WRITE(ah, AR_WA, ah->WARegVal);
}
/*
* Configire PCIE after Ini init. SERDES values now come from ini file
* This enables PCIe low power mode.
*/
if (AR_SREV_9300_20_OR_LATER(ah)) {
unsigned int i;
for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) {
REG_WRITE(ah,
INI_RA(&ah->iniPcieSerdesLowPower, i, 0),
INI_RA(&ah->iniPcieSerdesLowPower, i, 1));
}
}
}
/* Sets up the AR9003 hardware familiy callbacks */

14
drivers/net/wireless/ath/ath9k/hw.c
View File

@ -570,20 +570,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
ath9k_hw_init_mode_regs(ah);
/*
* Configire PCIE after Ini init. SERDES values now come from ini file
* This enables PCIe low power mode.
*/
if (AR_SREV_9300_20_OR_LATER(ah)) {
unsigned int i;
for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) {
REG_WRITE(ah,
INI_RA(&ah->iniPcieSerdesLowPower, i, 0),
INI_RA(&ah->iniPcieSerdesLowPower, i, 1));
}
}
/*
* Read back AR_WA into a permanent copy and set bits 14 and 17.
* We need to do this to avoid RMW of this register. We cannot