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scsi: ufs: Add HI3670 SoC UFS driver support
Add HI3670 SoC UFS driver support by extending the common ufs-hisi driver. One major difference between HI3660 ad HI3670 SoCs interms of UFS is the PHY. HI3670 has a 10nm variant PHY and hence this parameter is used to distinguish the configuration. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Wei Li <liwei213@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Manivannan Sadhasivam
Martin K. Petersen
parent
cc8ed1a9d6
commit
653fcb07d9
@ -66,7 +66,7 @@ static int ufs_hisi_check_hibern8(struct ufs_hba *hba)
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return err;
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}
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static void ufs_hi3660_clk_init(struct ufs_hba *hba)
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static void ufs_hisi_clk_init(struct ufs_hba *hba)
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{
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struct ufs_hisi_host *host = ufshcd_get_variant(hba);
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@ -80,7 +80,7 @@ static void ufs_hi3660_clk_init(struct ufs_hba *hba)
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ufs_sys_ctrl_set_bits(host, BIT_SYSCTRL_REF_CLOCK_EN, PHY_CLK_CTRL);
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}
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static void ufs_hi3660_soc_init(struct ufs_hba *hba)
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static void ufs_hisi_soc_init(struct ufs_hba *hba)
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{
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struct ufs_hisi_host *host = ufshcd_get_variant(hba);
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u32 reg;
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@ -139,6 +139,7 @@ static void ufs_hi3660_soc_init(struct ufs_hba *hba)
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static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba)
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{
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struct ufs_hisi_host *host = ufshcd_get_variant(hba);
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int err;
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uint32_t value;
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uint32_t reg;
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@ -153,6 +154,14 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba)
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8121, 0x0), 0x2D);
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/* MPHY CBOVRCTRL3 */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8122, 0x0), 0x1);
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if (host->caps & UFS_HISI_CAP_PHY10nm) {
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/* MPHY CBOVRCTRL4 */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8127, 0x0), 0x98);
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/* MPHY CBOVRCTRL5 */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8128, 0x0), 0x1);
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}
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/* Unipro VS_MphyCfgUpdt */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
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/* MPHY RXOVRCTRL4 rx0 */
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@ -173,10 +182,21 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba)
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x8113, 0x0), 0x1);
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xD085, 0x0), 0x1);
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/* Tactive RX */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x4), 0x7);
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/* Tactive RX */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x5), 0x7);
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if (host->caps & UFS_HISI_CAP_PHY10nm) {
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/* RX_Hibern8Time_Capability*/
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x4), 0xA);
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/* RX_Hibern8Time_Capability*/
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0092, 0x5), 0xA);
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/* RX_Min_ActivateTime */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x4), 0xA);
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/* RX_Min_ActivateTime*/
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008f, 0x5), 0xA);
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} else {
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/* Tactive RX */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x4), 0x7);
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/* Tactive RX */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x008F, 0x5), 0x7);
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}
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/* Gear3 Synclength */
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x0095, 0x4), 0x4F);
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@ -208,7 +228,8 @@ static int ufs_hisi_link_startup_pre_change(struct ufs_hba *hba)
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if (err)
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dev_err(hba->dev, "ufs_hisi_check_hibern8 error\n");
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ufshcd_writel(hba, UFS_HCLKDIV_NORMAL_VALUE, UFS_REG_HCLKDIV);
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if (!(host->caps & UFS_HISI_CAP_PHY10nm))
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ufshcd_writel(hba, UFS_HCLKDIV_NORMAL_VALUE, UFS_REG_HCLKDIV);
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/* disable auto H8 */
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reg = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER);
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@ -253,7 +274,7 @@ static int ufs_hisi_link_startup_post_change(struct ufs_hba *hba)
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return 0;
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}
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static int ufs_hi3660_link_startup_notify(struct ufs_hba *hba,
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static int ufs_hisi_link_startup_notify(struct ufs_hba *hba,
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enum ufs_notify_change_status status)
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{
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int err = 0;
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@ -391,6 +412,28 @@ static void ufs_hisi_set_dev_cap(struct ufs_hisi_dev_params *hisi_param)
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static void ufs_hisi_pwr_change_pre_change(struct ufs_hba *hba)
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{
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struct ufs_hisi_host *host = ufshcd_get_variant(hba);
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if (host->caps & UFS_HISI_CAP_PHY10nm) {
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/*
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* Boston platform need to set SaveConfigTime to 0x13,
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* and change sync length to maximum value
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*/
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/* VS_DebugSaveConfigTime */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0xD0A0), 0x13);
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/* g1 sync length */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1552), 0x4f);
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/* g2 sync length */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1554), 0x4f);
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/* g3 sync length */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x1556), 0x4f);
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/* PA_Hibern8Time */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a7), 0xA);
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/* PA_Tactivate */
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ufshcd_dme_set(hba, UIC_ARG_MIB((u32)0x15a8), 0xA);
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ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xd085, 0x0), 0x01);
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}
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if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME) {
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pr_info("ufs flash device must set VS_DebugSaveConfigTime 0x10\n");
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/* VS_DebugSaveConfigTime */
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@ -429,7 +472,7 @@ static void ufs_hisi_pwr_change_pre_change(struct ufs_hba *hba)
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ufshcd_dme_set(hba, UIC_ARG_MIB(0xd046), 32767);
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}
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static int ufs_hi3660_pwr_change_notify(struct ufs_hba *hba,
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static int ufs_hisi_pwr_change_notify(struct ufs_hba *hba,
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enum ufs_notify_change_status status,
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struct ufs_pa_layer_attr *dev_max_params,
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struct ufs_pa_layer_attr *dev_req_params)
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@ -567,25 +610,72 @@ static int ufs_hi3660_init(struct ufs_hba *hba)
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return ret;
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}
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ufs_hi3660_clk_init(hba);
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ufs_hisi_clk_init(hba);
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ufs_hi3660_soc_init(hba);
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ufs_hisi_soc_init(hba);
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return 0;
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}
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static struct ufs_hba_variant_ops ufs_hba_hisi_vops = {
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static int ufs_hi3670_init(struct ufs_hba *hba)
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{
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int ret = 0;
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struct device *dev = hba->dev;
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struct ufs_hisi_host *host;
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ret = ufs_hisi_init_common(hba);
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if (ret) {
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dev_err(dev, "%s: ufs common init fail\n", __func__);
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return ret;
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}
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ufs_hisi_clk_init(hba);
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ufs_hisi_soc_init(hba);
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/* Add cap for 10nm PHY variant on HI3670 SoC */
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host = ufshcd_get_variant(hba);
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host->caps |= UFS_HISI_CAP_PHY10nm;
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return 0;
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}
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static struct ufs_hba_variant_ops ufs_hba_hi3660_vops = {
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.name = "hi3660",
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.init = ufs_hi3660_init,
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.link_startup_notify = ufs_hi3660_link_startup_notify,
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.pwr_change_notify = ufs_hi3660_pwr_change_notify,
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.link_startup_notify = ufs_hisi_link_startup_notify,
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.pwr_change_notify = ufs_hisi_pwr_change_notify,
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.suspend = ufs_hisi_suspend,
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.resume = ufs_hisi_resume,
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};
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static struct ufs_hba_variant_ops ufs_hba_hi3670_vops = {
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.name = "hi3670",
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.init = ufs_hi3670_init,
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.link_startup_notify = ufs_hisi_link_startup_notify,
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.pwr_change_notify = ufs_hisi_pwr_change_notify,
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.suspend = ufs_hisi_suspend,
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.resume = ufs_hisi_resume,
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};
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static const struct of_device_id ufs_hisi_of_match[] = {
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{ .compatible = "hisilicon,hi3660-ufs", .data = &ufs_hba_hi3660_vops },
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{ .compatible = "hisilicon,hi3670-ufs", .data = &ufs_hba_hi3670_vops },
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{},
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};
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MODULE_DEVICE_TABLE(of, ufs_hisi_of_match);
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static int ufs_hisi_probe(struct platform_device *pdev)
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{
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return ufshcd_pltfrm_init(pdev, &ufs_hba_hisi_vops);
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const struct of_device_id *of_id;
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struct ufs_hba_variant_ops *vops;
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struct device *dev = &pdev->dev;
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of_id = of_match_node(ufs_hisi_of_match, dev->of_node);
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vops = (struct ufs_hba_variant_ops *)of_id->data;
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return ufshcd_pltfrm_init(pdev, vops);
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}
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static int ufs_hisi_remove(struct platform_device *pdev)
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@ -596,13 +686,6 @@ static int ufs_hisi_remove(struct platform_device *pdev)
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return 0;
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}
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static const struct of_device_id ufs_hisi_of_match[] = {
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{ .compatible = "hisilicon,hi3660-ufs" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ufs_hisi_of_match);
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static const struct dev_pm_ops ufs_hisi_pm_ops = {
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.suspend = ufshcd_pltfrm_suspend,
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.resume = ufshcd_pltfrm_resume,
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@ -91,6 +91,9 @@ enum {
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#define UFS_HISI_LIMIT_HS_RATE PA_HS_MODE_B
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#define UFS_HISI_LIMIT_DESIRED_MODE FAST
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#define UFS_HISI_CAP_RESERVED BIT(0)
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#define UFS_HISI_CAP_PHY10nm BIT(1)
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struct ufs_hisi_host {
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struct ufs_hba *hba;
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void __iomem *ufs_sys_ctrl;
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@ -112,4 +115,5 @@ struct ufs_hisi_host {
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ufs_sys_ctrl_writel((host), \
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((~(mask)) & (ufs_sys_ctrl_readl((host), (reg)))), \
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(reg))
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#endif /* UFS_HISI_H_ */
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