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PCI: Clean up quirk_io_region
Before every call of quirk_io_region(), pci_read_config_word() is called. We can fold that call into quirk_io_region() to make code more readable. [bhelgaas: changelog, fill bus_region directly rather than copying from res] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -324,29 +324,30 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
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static void quirk_io_region(struct pci_dev *dev, unsigned region,
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unsigned size, int nr, const char *name)
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static void quirk_io_region(struct pci_dev *dev, int port,
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unsigned size, int nr, const char *name)
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{
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region &= ~(size-1);
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if (region) {
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struct pci_bus_region bus_region;
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struct resource *res = dev->resource + nr;
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u16 region;
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struct pci_bus_region bus_region;
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struct resource *res = dev->resource + nr;
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res->name = pci_name(dev);
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res->start = region;
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res->end = region + size - 1;
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res->flags = IORESOURCE_IO;
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pci_read_config_word(dev, port, ®ion);
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region &= ~(size - 1);
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/* Convert from PCI bus to resource space. */
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bus_region.start = res->start;
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bus_region.end = res->end;
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pcibios_bus_to_resource(dev, res, &bus_region);
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if (!region)
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return;
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if (pci_claim_resource(dev, nr) == 0)
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
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res, name);
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}
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}
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res->name = pci_name(dev);
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res->flags = IORESOURCE_IO;
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/* Convert from PCI bus to resource space */
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bus_region.start = region;
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bus_region.end = region + size - 1;
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pcibios_bus_to_resource(dev, res, &bus_region);
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if (!pci_claim_resource(dev, nr))
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
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}
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/*
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* ATI Northbridge setups MCE the processor if you even
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@ -374,12 +375,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_
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*/
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static void quirk_ali7101_acpi(struct pci_dev *dev)
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{
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u16 region;
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pci_read_config_word(dev, 0xE0, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
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pci_read_config_word(dev, 0xE2, ®ion);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
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quirk_io_region(dev, 0xE0, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
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quirk_io_region(dev, 0xE2, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi);
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@ -442,12 +439,10 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
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*/
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static void quirk_piix4_acpi(struct pci_dev *dev)
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{
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u32 region, res_a;
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u32 res_a;
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pci_read_config_dword(dev, 0x40, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
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pci_read_config_dword(dev, 0x90, ®ion);
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quirk_io_region(dev, region, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
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quirk_io_region(dev, 0x40, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
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quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
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/* Device resource A has enables for some of the other ones */
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pci_read_config_dword(dev, 0x5c, &res_a);
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@ -491,7 +486,6 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3, qui
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*/
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static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
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{
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u32 region;
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u8 enable;
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/*
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@ -503,22 +497,14 @@ static void quirk_ich4_lpc_acpi(struct pci_dev *dev)
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*/
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pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
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if (enable & ICH4_ACPI_EN) {
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pci_read_config_dword(dev, ICH_PMBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
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"ICH4 ACPI/GPIO/TCO");
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}
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if (enable & ICH4_ACPI_EN)
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quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
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"ICH4 ACPI/GPIO/TCO");
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pci_read_config_byte(dev, ICH4_GPIO_CNTL, &enable);
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if (enable & ICH4_GPIO_EN) {
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pci_read_config_dword(dev, ICH4_GPIOBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 64,
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PCI_BRIDGE_RESOURCES + 1, "ICH4 GPIO");
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}
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if (enable & ICH4_GPIO_EN)
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quirk_io_region(dev, ICH4_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
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"ICH4 GPIO");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi);
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@ -533,26 +519,17 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, qui
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static void ich6_lpc_acpi_gpio(struct pci_dev *dev)
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{
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u32 region;
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u8 enable;
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pci_read_config_byte(dev, ICH_ACPI_CNTL, &enable);
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if (enable & ICH6_ACPI_EN) {
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pci_read_config_dword(dev, ICH_PMBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES,
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"ICH6 ACPI/GPIO/TCO");
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}
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if (enable & ICH6_ACPI_EN)
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quirk_io_region(dev, ICH_PMBASE, 128, PCI_BRIDGE_RESOURCES,
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"ICH6 ACPI/GPIO/TCO");
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pci_read_config_byte(dev, ICH6_GPIO_CNTL, &enable);
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if (enable & ICH6_GPIO_EN) {
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pci_read_config_dword(dev, ICH6_GPIOBASE, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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if (region >= PCIBIOS_MIN_IO)
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quirk_io_region(dev, region, 64,
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PCI_BRIDGE_RESOURCES + 1, "ICH6 GPIO");
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}
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if (enable & ICH6_GPIO_EN)
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quirk_io_region(dev, ICH6_GPIOBASE, 64, PCI_BRIDGE_RESOURCES+1,
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"ICH6 GPIO");
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}
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static void ich6_lpc_generic_decode(struct pci_dev *dev, unsigned reg, const char *name, int dynsize)
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@ -650,13 +627,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_1, qui
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*/
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static void quirk_vt82c586_acpi(struct pci_dev *dev)
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{
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u32 region;
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if (dev->revision & 0x10) {
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pci_read_config_dword(dev, 0x48, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
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}
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if (dev->revision & 0x10)
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quirk_io_region(dev, 0x48, 256, PCI_BRIDGE_RESOURCES,
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"vt82c586 ACPI");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi);
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@ -668,18 +641,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt
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*/
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static void quirk_vt82c686_acpi(struct pci_dev *dev)
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{
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u16 hm;
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u32 smb;
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quirk_vt82c586_acpi(dev);
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pci_read_config_word(dev, 0x70, &hm);
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hm &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1, "vt82c686 HW-mon");
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quirk_io_region(dev, 0x70, 128, PCI_BRIDGE_RESOURCES+1,
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"vt82c686 HW-mon");
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pci_read_config_dword(dev, 0x90, &smb);
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smb &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2, "vt82c686 SMB");
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quirk_io_region(dev, 0x90, 16, PCI_BRIDGE_RESOURCES+2, "vt82c686 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi);
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@ -690,15 +657,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt
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*/
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static void quirk_vt8235_acpi(struct pci_dev *dev)
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{
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u16 pm, smb;
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pci_read_config_word(dev, 0x88, &pm);
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pm &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
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pci_read_config_word(dev, 0xd0, &smb);
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smb &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1, "vt8235 SMB");
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quirk_io_region(dev, 0x88, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
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quirk_io_region(dev, 0xd0, 16, PCI_BRIDGE_RESOURCES+1, "vt8235 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
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