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dt-bindings: clock: ti: remove unstable remark
Several TI SoC clock bindings were marked as work-in-progress / unstable
between 2013-2016, for example in commit f60b1ea5ea
("CLK: TI: add
support for gate clock"). It was enough of time to consider them stable
and expect usual ABI rules.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20240224091236.10146-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
parent
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63fd4d7dc4
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Binding for Texas Instruments ADPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped ADPLL with two to three selectable input clocks
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and three to four children.
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Binding for Texas Instruments APLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped APLL with usually two selectable input clocks
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(reference clock and bypass clock), with analog phase locked
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Binding for Texas Instruments autoidle clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a register mapped
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clock which can be put to idle automatically by hardware based on the usage
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and a configuration bit setting. Autoidle clock is never an individual
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Binding for Texas Instruments clockdomain.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1] in consumer role.
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Every clock on TI SoC belongs to one clockdomain, but software
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only needs this information for specific clocks which require
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Binding for TI composite clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped composite clock with multiple different sub-types;
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Binding for TI divider clock
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped adjustable clock rate divider that does not gate and has
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only one input clock or parent. By default the value programmed into
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Binding for Texas Instruments DPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped DPLL with usually two selectable input clocks
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(reference clock and bypass clock), with digital phase locked
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Binding for Texas Instruments FAPLL clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped FAPLL with usually two selectable input clocks
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(reference clock and bypass clock), and one or more child
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Binding for TI fixed factor rate clock sources.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1], and also uses the autoidle
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support from TI autoidle clock [2].
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Binding for Texas Instruments gate clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. This clock is
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quite much similar to the basic gate-clock [2], however,
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it supports a number of additional features. If no register
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Binding for Texas Instruments interface clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. This clock is
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quite much similar to the basic gate-clock [2], however,
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it supports a number of additional features, including
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Binding for TI mux clock.
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Binding status: Unstable - ABI compatibility may be broken in the future
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This binding uses the common clock binding[1]. It assumes a
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register-mapped multiplexer with multiple input clock signals or
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parents, one of which can be selected as output. This clock does not
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