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EDAC/amd64: Split prep_chip_selects() into dct/umc functions

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Call them from their respective hw_info_get() function. Avoid the
need for family/model-based function pointers.

Add the calls before reading hardware registers from the memory
controllers, since the number of chip select bases and masks needs to be
known first.

  [ Yazen: rebased/reworked patch and reworded commit message. ]

Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com>
Co-developed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Co-developed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230127170419.1824692-13-yazen.ghannam@amd.com
This commit is contained in:
Muralidhara M K 2023-01-27 17:04:09 +00:00 committed by Borislav Petkov (AMD)
parent 9a97a7f4d7
commit 637f60ef2c
1 changed files with 13 additions and 11 deletions
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24
drivers/edac/amd64_edac.c
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@ -1614,7 +1614,7 @@ static void dump_misc_regs(struct amd64_pvt *pvt)
/*
* See BKDG, F2x[1,0][5C:40], F2[1,0][6C:60]
*/
static void prep_chip_selects(struct amd64_pvt *pvt)
static void dct_prep_chip_selects(struct amd64_pvt *pvt)
{
if (pvt->fam == 0xf && pvt->ext_model < K8_REV_F) {
pvt->csels[0].b_cnt = pvt->csels[1].b_cnt = 8;
@ -1622,20 +1622,22 @@ static void prep_chip_selects(struct amd64_pvt *pvt)
} else if (pvt->fam == 0x15 && pvt->model == 0x30) {
pvt->csels[0].b_cnt = pvt->csels[1].b_cnt = 4;
pvt->csels[0].m_cnt = pvt->csels[1].m_cnt = 2;
} else if (pvt->fam >= 0x17) {
int umc;
for_each_umc(umc) {
pvt->csels[umc].b_cnt = 4;
pvt->csels[umc].m_cnt = pvt->flags.zn_regs_v2 ? 4 : 2;
}
} else {
pvt->csels[0].b_cnt = pvt->csels[1].b_cnt = 8;
pvt->csels[0].m_cnt = pvt->csels[1].m_cnt = 4;
}
}
static void umc_prep_chip_selects(struct amd64_pvt *pvt)
{
int umc;
for_each_umc(umc) {
pvt->csels[umc].b_cnt = 4;
pvt->csels[umc].m_cnt = pvt->flags.zn_regs_v2 ? 4 : 2;
}
}
static void read_umc_base_mask(struct amd64_pvt *pvt)
{
u32 umc_base_reg, umc_base_reg_sec;
@ -1694,8 +1696,6 @@ static void read_dct_base_mask(struct amd64_pvt *pvt)
{
int cs;
prep_chip_selects(pvt);
if (pvt->umc)
return read_umc_base_mask(pvt);
@ -3665,6 +3665,7 @@ static int dct_hw_info_get(struct amd64_pvt *pvt)
if (ret)
return ret;
dct_prep_chip_selects(pvt);
read_mc_regs(pvt);
return 0;
@ -3676,6 +3677,7 @@ static int umc_hw_info_get(struct amd64_pvt *pvt)
if (!pvt->umc)
return -ENOMEM;
umc_prep_chip_selects(pvt);
read_mc_regs(pvt);
return 0;