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mtd: nand: pxa3xx: Allocate data buffer on detected flash size
This commit replaces the currently hardcoded buffer size, by a dynamic detection scheme. First a small 256 bytes buffer is allocated so the device can be detected (using READID and friends commands). After detection, this buffer is released and a new buffer is allocated to acommodate the page size plus out-of-band size. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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@ -39,6 +39,13 @@
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#define NAND_STOP_DELAY (2 * HZ/50)
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#define PAGE_CHUNK_SIZE (2048)
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/*
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* Define a buffer size for the initial command that detects the flash device:
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* STATUS, READID and PARAM. The largest of these is the PARAM command,
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* needing 256 bytes.
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*/
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#define INIT_BUFFER_SIZE 256
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/* registers and bit definitions */
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#define NDCR (0x00) /* Control register */
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#define NDTR0CS0 (0x04) /* Timing Parameter 0 for CS0 */
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@ -164,6 +171,7 @@ struct pxa3xx_nand_info {
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unsigned int buf_start;
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unsigned int buf_count;
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unsigned int buf_size;
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/* DMA information */
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int drcmr_dat;
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@ -911,26 +919,20 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
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return 0;
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}
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/* the maximum possible buffer size for large page with OOB data
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* is: 2048 + 64 = 2112 bytes, allocate a page here for both the
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* data buffer and the DMA descriptor
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*/
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#define MAX_BUFF_SIZE PAGE_SIZE
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#ifdef ARCH_HAS_DMA
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static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
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{
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struct platform_device *pdev = info->pdev;
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int data_desc_offset = MAX_BUFF_SIZE - sizeof(struct pxa_dma_desc);
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int data_desc_offset = info->buf_size - sizeof(struct pxa_dma_desc);
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if (use_dma == 0) {
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info->data_buff = kmalloc(MAX_BUFF_SIZE, GFP_KERNEL);
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info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
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if (info->data_buff == NULL)
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return -ENOMEM;
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return 0;
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}
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info->data_buff = dma_alloc_coherent(&pdev->dev, MAX_BUFF_SIZE,
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info->data_buff = dma_alloc_coherent(&pdev->dev, info->buf_size,
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&info->data_buff_phys, GFP_KERNEL);
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if (info->data_buff == NULL) {
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dev_err(&pdev->dev, "failed to allocate dma buffer\n");
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@ -944,7 +946,7 @@ static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
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pxa3xx_nand_data_dma_irq, info);
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if (info->data_dma_ch < 0) {
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dev_err(&pdev->dev, "failed to request data dma\n");
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dma_free_coherent(&pdev->dev, MAX_BUFF_SIZE,
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dma_free_coherent(&pdev->dev, info->buf_size,
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info->data_buff, info->data_buff_phys);
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return info->data_dma_ch;
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}
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@ -962,7 +964,7 @@ static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
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struct platform_device *pdev = info->pdev;
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if (use_dma) {
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pxa_free_dma(info->data_dma_ch);
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dma_free_coherent(&pdev->dev, MAX_BUFF_SIZE,
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dma_free_coherent(&pdev->dev, info->buf_size,
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info->data_buff, info->data_buff_phys);
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} else {
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kfree(info->data_buff);
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@ -971,7 +973,7 @@ static void pxa3xx_nand_free_buff(struct pxa3xx_nand_info *info)
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#else
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static int pxa3xx_nand_init_buff(struct pxa3xx_nand_info *info)
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{
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info->data_buff = kmalloc(MAX_BUFF_SIZE, GFP_KERNEL);
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info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
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if (info->data_buff == NULL)
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return -ENOMEM;
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return 0;
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@ -1085,7 +1087,16 @@ KEEP_CONFIG:
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else
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host->col_addr_cycles = 1;
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/* release the initial buffer */
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kfree(info->data_buff);
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/* allocate the real data + oob buffer */
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info->buf_size = mtd->writesize + mtd->oobsize;
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ret = pxa3xx_nand_init_buff(info);
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if (ret)
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return ret;
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info->oob_buff = info->data_buff + mtd->writesize;
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if ((mtd->size >> chip->page_shift) > 65536)
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host->row_addr_cycles = 3;
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else
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@ -1191,9 +1202,13 @@ static int alloc_nand_resource(struct platform_device *pdev)
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}
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info->mmio_phys = r->start;
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ret = pxa3xx_nand_init_buff(info);
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if (ret)
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/* Allocate a buffer to allow flash detection */
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info->buf_size = INIT_BUFFER_SIZE;
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info->data_buff = kmalloc(info->buf_size, GFP_KERNEL);
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if (info->data_buff == NULL) {
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ret = -ENOMEM;
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goto fail_disable_clk;
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}
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/* initialize all interrupts to be disabled */
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disable_int(info, NDSR_MASK);
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@ -1211,7 +1226,7 @@ static int alloc_nand_resource(struct platform_device *pdev)
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fail_free_buf:
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free_irq(irq, info);
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pxa3xx_nand_free_buff(info);
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kfree(info->data_buff);
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fail_disable_clk:
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clk_disable_unprepare(info->clk);
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return ret;
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