mirror of
https://github.com/torvalds/linux.git
synced 2024-09-20 06:53:04 +00:00
drm/i915/dp: Keep cached LTTPR mode up-to-date
Nothing depends on the cached LTTPR mode, however for consistency keep it up-to-date with the value programmed to the DPCD register. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240708190029.271247-5-imre.deak@intel.com
This commit is contained in:
parent
4613aa66e4
commit
61fe488fc7
|
@ -114,7 +114,13 @@ intel_dp_set_lttpr_transparent_mode(struct intel_dp *intel_dp, bool enable)
|
|||
u8 val = enable ? DP_PHY_REPEATER_MODE_TRANSPARENT :
|
||||
DP_PHY_REPEATER_MODE_NON_TRANSPARENT;
|
||||
|
||||
return drm_dp_dpcd_write(&intel_dp->aux, DP_PHY_REPEATER_MODE, &val, 1) == 1;
|
||||
if (drm_dp_dpcd_write(&intel_dp->aux, DP_PHY_REPEATER_MODE, &val, 1) != 1)
|
||||
return false;
|
||||
|
||||
intel_dp->lttpr_common_caps[DP_PHY_REPEATER_MODE -
|
||||
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV] = val;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool intel_dp_lttpr_transparent_mode_enabled(struct intel_dp *intel_dp)
|
||||
|
|
Loading…
Reference in New Issue
Block a user