Merge tag 'imx-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Pull "Freescale arm64 device tree updates for 4.17" from Shawn Guo:
 - Move cpu_thermal device out of bus node to fix DTC simple_bus_reg
   warning seen with W=1 switch.
 - Fix IFC child nodes' unit-address to eliminate DTC simple_bus_reg
   warnings.
 - Add a dummy size memory 'reg' property for LS1046A device tree to
   avoid unit_address_vs_reg DTC warning, and the real size will be
   filled by bootloader.
 - Update ls208xa-qds board device tree to fix unit_address_vs_reg
   warnings with DSPI device.
 - Add idle-states for LS1012A and LS1043A, and correct
   arm,psci-suspend-param setting for already added idle-states.
 - DPAA QBMan portal and watchdog device addition.

* tag 'imx-dt64-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: ifc: Fix the unit address format in the examples
  arm64: dts: ls1046a: add a dummy memory 'reg' property
  arm64: dts: fsl: fix ifc simple-bus unit address format warnings
  arm64: dts: fsl: update the cpu idle node
  arm64: dts: ls1043a: add cpu idle support
  arm64: dts: ls1012a: add cpu idle support
  arm64: dts: ls208xa-qds: Fix the 'reg' property
  arm64: dts: ls208xa-qds: Pass unit name to dspi child nodes
  arm64: dts: ls208xa: Move cpu_thermal out of bus node
  arm64: dts: ls1088a: Move cpu_thermal out of bus node
  arm64: dts: ls1046a: Move cpu_thermal out of bus node
  arm64: dts: ls1043a: Move cpu_thermal out of bus node
  arm64: dts: ls1012a: Move cpu_thermal out of bus node
  arm64: dts: Add DPAA QBMan portal 9
  arm64: dts: ls1088a: add DT node of watchdog
This commit is contained in:
Arnd Bergmann 2018-03-15 16:25:44 +01:00
commit 614bae98cb
16 changed files with 319 additions and 209 deletions

View File

@ -43,7 +43,7 @@ Example:
0x1 0x0 0x0 0xffa00000 0x00010000
0x3 0x0 0x0 0xffb00000 0x00020000>;
flash@0,0 {
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
@ -58,7 +58,7 @@ Example:
};
};
flash@1,0 {
flash@100000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,ifc-nand";
@ -73,7 +73,7 @@ Example:
};
};
cpld@3,0 {
cpld@@300000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p1010rdb-cpld";

View File

@ -70,6 +70,24 @@
reg = <0x0>;
clocks = <&clockgen 1 0>;
#cooling-cells = <2>;
cpu-idle-states = <&CPU_PH20>;
};
};
idle-states {
/*
* PSCI node is not added default, U-boot will add missing
* parts if it determines to use PSCI.
*/
entry-method = "arm,psci";
CPU_PH20: cpu-ph20 {
compatible = "arm,idle-state";
idle-state-name = "PH20";
arm,psci-suspend-param = <0x0>;
entry-latency-us = <1000>;
exit-latency-us = <1000>;
min-residency-us = <3000>;
};
};
@ -118,6 +136,37 @@
mask = <0x02>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
@ -304,37 +353,6 @@
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
i2c0: i2c@2180000 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;

View File

@ -84,19 +84,19 @@
0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay";
nor@0,0 {
nor@0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@1,0 {
nand@100000000 {
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>;
};
fpga: board-control@2,0 {
fpga: board-control@200000000 {
compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>;
};

View File

@ -97,7 +97,7 @@
0x1 0x0 0x0 0x7e800000 0x00010000
0x2 0x0 0x0 0x7fb00000 0x00000100>;
nor@0,0 {
nor@0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
@ -106,14 +106,14 @@
device-width = <1>;
};
nand@1,0 {
nand@100000000 {
compatible = "fsl,ifc-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1 0x0 0x10000>;
};
cpld: board-control@2,0 {
cpld: board-control@200000000 {
compatible = "fsl,ls1043ardb-cpld";
reg = <0x2 0x0 0x0000100>;
};

View File

@ -81,6 +81,7 @@
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu1: cpu@1 {
@ -89,6 +90,7 @@
reg = <0x1>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu2: cpu@2 {
@ -97,6 +99,7 @@
reg = <0x2>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
cpu3: cpu@3 {
@ -105,6 +108,7 @@
reg = <0x3>;
clocks = <&clockgen 1 0>;
next-level-cache = <&l2>;
cpu-idle-states = <&CPU_PH20>;
};
l2: l2-cache {
@ -112,6 +116,23 @@
};
};
idle-states {
/*
* PSCI node is not added default, U-boot will add missing
* parts if it determines to use PSCI.
*/
entry-method = "arm,psci";
CPU_PH20: cpu-ph20 {
compatible = "arm,idle-state";
idle-state-name = "PH20";
arm,psci-suspend-param = <0x0>;
entry-latency-us = <1000>;
exit-latency-us = <1000>;
min-residency-us = <3000>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x80000000>;
@ -159,6 +180,37 @@
mask = <0x02>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 3>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0xf08>, /* Physical Secure PPI */
@ -342,37 +394,6 @@
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 3>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
qman: qman@1880000 {
compatible = "fsl,qman";
reg = <0x0 0x1880000 0x0 0x10000>;

View File

@ -175,19 +175,19 @@
0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay";
nor@0,0 {
nor@0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@1,0 {
nand@100000000 {
compatible = "fsl,ifc-nand";
reg = <0x1 0x0 0x10000>;
};
fpga: board-control@2,0 {
fpga: board-control@200000000 {
compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>;
};

View File

@ -122,14 +122,14 @@
0x2 0x0 0x0 0x7fb00000 0x00000100>;
status = "okay";
nand@0,0 {
nand@0 {
compatible = "fsl,ifc-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x10000>;
};
cpld: board-control@2,0 {
cpld: board-control@200000000 {
compatible = "fsl,ls1046ardb-cpld";
reg = <0x2 0x0 0x0000100>;
};

View File

@ -122,7 +122,7 @@
CPU_PH20: cpu-ph20 {
compatible = "arm,idle-state";
idle-state-name = "PH20";
arm,psci-suspend-param = <0x00010000>;
arm,psci-suspend-param = <0x0>;
entry-latency-us = <1000>;
exit-latency-us = <1000>;
min-residency-us = <3000>;
@ -131,6 +131,8 @@
memory@80000000 {
device_type = "memory";
/* Real size will be filled by bootloader */
reg = <0x0 0x80000000 0x0 0x0>;
};
sysclk: sysclk {
@ -147,6 +149,37 @@
mask = <0x02>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 3>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(0xf) |
@ -362,37 +395,6 @@
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 3>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
dspi: dspi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;

View File

@ -116,19 +116,19 @@
3 0 0x5 0x20000000 0x00010000>;
status = "okay";
nor@0,0 {
nor@0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@2,0 {
nand@200000000 {
compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>;
};
fpga: board-control@3,0 {
fpga: board-control@300000000 {
compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
reg = <0x3 0x0 0x0000100>;
};

View File

@ -99,12 +99,12 @@
2 0 0x5 0x20000000 0x00010000>;
status = "okay";
nand@0,0 {
nand@0 {
compatible = "fsl,ifc-nand";
reg = <0x0 0x0 0x10000>;
};
fpga: board-control@2,0 {
fpga: board-control@200000000 {
compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
reg = <0x2 0x0 0x0000100>;
};

View File

@ -130,7 +130,7 @@
CPU_PH20: cpu-ph20 {
compatible = "arm,idle-state";
idle-state-name = "PH20";
arm,psci-suspend-param = <0x00010000>;
arm,psci-suspend-param = <0x0>;
entry-latency-us = <1000>;
exit-latency-us = <1000>;
min-residency-us = <3000>;
@ -158,6 +158,44 @@
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
@ -315,44 +353,6 @@
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 0>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
duart0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;
@ -612,6 +612,62 @@
<0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
};
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core1_watchdog: wdt@c010000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core2_watchdog: wdt@c020000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core3_watchdog: wdt@c030000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core0_watchdog: wdt@c100000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core1_watchdog: wdt@c110000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core2_watchdog: wdt@c120000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core3_watchdog: wdt@c130000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
};
firmware {

View File

@ -143,7 +143,7 @@
CPU_PW20: cpu-pw20 {
compatible = "arm,idle-state";
idle-state-name = "PW20";
arm,psci-suspend-param = <0x00010000>;
arm,psci-suspend-param = <0x0>;
entry-latency-us = <2000>;
exit-latency-us = <2000>;
min-residency-us = <6000>;

View File

@ -58,7 +58,7 @@
0x2 0x0 0x5 0x30000000 0x00010000
0x3 0x0 0x5 0x20000000 0x00010000>;
nor@0,0 {
nor@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
@ -67,12 +67,12 @@
device-width = <1>;
};
nand@2,0 {
nand@200000000 {
compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>;
};
cpld@3,0 {
cpld@300000000 {
reg = <0x3 0x0 0x10000>;
compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
};
@ -140,21 +140,21 @@
&dspi {
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p80";
spi-max-frequency = <3000000>;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p80";
spi-max-frequency = <3000000>;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p80";
@ -177,7 +177,7 @@
#size-cells = <1>;
compatible = "st,m25p80";
spi-max-frequency = <20000000>;
reg = <0>;
reg = <2>;
};
};

View File

@ -111,6 +111,55 @@
mask = <0x2>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 4>;
trips {
cpu_alert: cpu-alert {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <85000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu2 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert>;
cooling-device =
<&cpu6 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
@ -194,55 +243,6 @@
#thermal-sensor-cells = <1>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu 4>;
trips {
cpu_alert: cpu-alert {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <85000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu2 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert>;
cooling-device =
<&cpu6 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
serial0: serial@21c0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21c0500 0x0 0x100>;

View File

@ -68,4 +68,10 @@
reg = <0x80000 0x4000>, <0x4080000 0x4000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
};
bman-portal@90000 {
compatible = "fsl,bman-portal";
reg = <0x90000 0x4000>, <0x4090000 0x4000>;
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
};
};

View File

@ -77,4 +77,11 @@
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <8>;
};
qportal9: qman-portal@90000 {
compatible = "fsl,qman-portal";
reg = <0x90000 0x4000>, <0x4090000 0x4000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
cell-index = <9>;
};
};