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bpf: Add instructions for atomic_[cmp]xchg
This adds two atomic opcodes, both of which include the BPF_FETCH flag. XCHG without the BPF_FETCH flag would naturally encode atomic_set. This is not supported because it would be of limited value to userspace (it doesn't imply any barriers). CMPXCHG without BPF_FETCH woulud be an atomic compare-and-write. We don't have such an operation in the kernel so it isn't provided to BPF either. There are two significant design decisions made for the CMPXCHG instruction: - To solve the issue that this operation fundamentally has 3 operands, but we only have two register fields. Therefore the operand we compare against (the kernel's API calls it 'old') is hard-coded to be R0. x86 has similar design (and A64 doesn't have this problem). A potential alternative might be to encode the other operand's register number in the immediate field. - The kernel's atomic_cmpxchg returns the old value, while the C11 userspace APIs return a boolean indicating the comparison result. Which should BPF do? A64 returns the old value. x86 returns the old value in the hard-coded register (and also sets a flag). That means return-old-value is easier to JIT, so that's what we use. Signed-off-by: Brendan Jackman <jackmanb@google.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Acked-by: Yonghong Song <yhs@fb.com> Link: https://lore.kernel.org/bpf/20210114181751.768687-8-jackmanb@google.com
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@ -815,6 +815,14 @@ static int emit_atomic(u8 **pprog, u8 atomic_op,
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/* src_reg = atomic_fetch_add(dst_reg + off, src_reg); */
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EMIT2(0x0F, 0xC1);
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break;
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case BPF_XCHG:
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/* src_reg = atomic_xchg(dst_reg + off, src_reg); */
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EMIT1(0x87);
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break;
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case BPF_CMPXCHG:
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/* r0 = atomic_cmpxchg(dst_reg + off, r0, src_reg); */
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EMIT2(0x0F, 0xB1);
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break;
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default:
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pr_err("bpf_jit: unknown atomic opcode %02x\n", atomic_op);
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return -EFAULT;
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@ -265,6 +265,8 @@ static inline bool insn_is_zext(const struct bpf_insn *insn)
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*
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* BPF_ADD *(uint *) (dst_reg + off16) += src_reg
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* BPF_ADD | BPF_FETCH src_reg = atomic_fetch_add(dst_reg + off16, src_reg);
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* BPF_XCHG src_reg = atomic_xchg(dst_reg + off16, src_reg)
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* BPF_CMPXCHG r0 = atomic_cmpxchg(dst_reg + off16, r0, src_reg)
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*/
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#define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF) \
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@ -45,7 +45,9 @@
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#define BPF_EXIT 0x90 /* function return */
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/* atomic op type fields (stored in immediate) */
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#define BPF_FETCH 0x01 /* fetch previous value into src reg */
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#define BPF_FETCH 0x01 /* not an opcode on its own, used to build others */
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#define BPF_XCHG (0xe0 | BPF_FETCH) /* atomic exchange */
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#define BPF_CMPXCHG (0xf0 | BPF_FETCH) /* atomic compare-and-write */
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/* Register numbers */
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enum {
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@ -1630,6 +1630,16 @@ out:
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(u32) SRC,
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(atomic_t *)(unsigned long) (DST + insn->off));
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break;
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case BPF_XCHG:
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SRC = (u32) atomic_xchg(
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(atomic_t *)(unsigned long) (DST + insn->off),
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(u32) SRC);
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break;
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case BPF_CMPXCHG:
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BPF_R0 = (u32) atomic_cmpxchg(
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(atomic_t *)(unsigned long) (DST + insn->off),
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(u32) BPF_R0, (u32) SRC);
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break;
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default:
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goto default_label;
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}
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@ -1647,6 +1657,16 @@ out:
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(u64) SRC,
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(atomic64_t *)(unsigned long) (DST + insn->off));
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break;
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case BPF_XCHG:
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SRC = (u64) atomic64_xchg(
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(atomic64_t *)(unsigned long) (DST + insn->off),
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(u64) SRC);
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break;
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case BPF_CMPXCHG:
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BPF_R0 = (u64) atomic64_cmpxchg(
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(atomic64_t *)(unsigned long) (DST + insn->off),
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(u64) BPF_R0, (u64) SRC);
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break;
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default:
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goto default_label;
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}
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@ -167,6 +167,21 @@ void print_bpf_insn(const struct bpf_insn_cbs *cbs,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off, insn->src_reg);
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} else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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insn->imm == BPF_CMPXCHG) {
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verbose(cbs->private_data, "(%02x) r0 = atomic%s_cmpxchg((%s *)(r%d %+d), r0, r%d)\n",
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insn->code,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off,
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insn->src_reg);
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} else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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insn->imm == BPF_XCHG) {
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verbose(cbs->private_data, "(%02x) r%d = atomic%s_xchg((%s *)(r%d %+d), r%d)\n",
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insn->code, insn->src_reg,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off, insn->src_reg);
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} else {
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verbose(cbs->private_data, "BUG_%02x\n", insn->code);
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}
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@ -3606,11 +3606,14 @@ static int check_mem_access(struct bpf_verifier_env *env, int insn_idx, u32 regn
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static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_insn *insn)
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{
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int load_reg;
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int err;
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switch (insn->imm) {
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case BPF_ADD:
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case BPF_ADD | BPF_FETCH:
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case BPF_XCHG:
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case BPF_CMPXCHG:
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break;
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default:
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verbose(env, "BPF_ATOMIC uses invalid atomic opcode %02x\n", insn->imm);
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@ -3632,6 +3635,13 @@ static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_i
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if (err)
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return err;
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if (insn->imm == BPF_CMPXCHG) {
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/* Check comparison of R0 with memory location */
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err = check_reg_arg(env, BPF_REG_0, SRC_OP);
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if (err)
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return err;
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}
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if (is_pointer_value(env, insn->src_reg)) {
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verbose(env, "R%d leaks addr into mem\n", insn->src_reg);
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return -EACCES;
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@ -3662,8 +3672,13 @@ static int check_atomic(struct bpf_verifier_env *env, int insn_idx, struct bpf_i
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if (!(insn->imm & BPF_FETCH))
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return 0;
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/* check and record load of old value into src reg */
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err = check_reg_arg(env, insn->src_reg, DST_OP);
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if (insn->imm == BPF_CMPXCHG)
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load_reg = BPF_REG_0;
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else
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load_reg = insn->src_reg;
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/* check and record load of old value */
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err = check_reg_arg(env, load_reg, DST_OP);
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if (err)
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return err;
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@ -174,6 +174,8 @@
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*
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* BPF_ADD *(uint *) (dst_reg + off16) += src_reg
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* BPF_ADD | BPF_FETCH src_reg = atomic_fetch_add(dst_reg + off16, src_reg);
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* BPF_XCHG src_reg = atomic_xchg(dst_reg + off16, src_reg)
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* BPF_CMPXCHG r0 = atomic_cmpxchg(dst_reg + off16, r0, src_reg)
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*/
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#define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF) \
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@ -45,7 +45,9 @@
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#define BPF_EXIT 0x90 /* function return */
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/* atomic op type fields (stored in immediate) */
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#define BPF_FETCH 0x01 /* fetch previous value into src reg */
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#define BPF_FETCH 0x01 /* not an opcode on its own, used to build others */
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#define BPF_XCHG (0xe0 | BPF_FETCH) /* atomic exchange */
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#define BPF_CMPXCHG (0xf0 | BPF_FETCH) /* atomic compare-and-write */
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/* Register numbers */
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enum {
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