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ARM: S5PV210: Add support for GPIO Interrupt
S5PV210/S5PC110 can use common S5P GPIO interrupt code. This patch adds required defines and code to make use of it. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: minor title fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -150,6 +150,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
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.label = "GPG3",
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},
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}, {
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.config = &gpio_cfg_noint,
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.chip = {
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.base = S5PV210_GPI(0),
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.ngpio = S5PV210_GPIO_I_NR,
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@ -259,11 +260,14 @@ static __init int s5pv210_gpiolib_init(void)
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{
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struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
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int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
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int gpioint_group = 0;
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int i = 0;
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for (i = 0; i < nr_chips; i++, chip++) {
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if (chip->config == NULL)
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if (chip->config == NULL) {
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chip->config = &gpio_cfg;
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chip->group = gpioint_group++;
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}
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if (chip->base == NULL)
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chip->base = S5PV210_BANK_BASE(i);
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}
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@ -121,8 +121,12 @@
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#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
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#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
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/* GPIO interrupt */
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#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
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#define S5P_GPIOINT_GROUP_MAXNR 22
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/* Set the default NR_IRQS */
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#define NR_IRQS (IRQ_EINT(31) + 1)
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#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
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/* Compatibility */
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#define IRQ_LCD_FIFO IRQ_LCD0
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