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MIPS: i8259: DT support
Support probing the i8259 programmable interrupt controller, as found on the Malta board, and using its interrupts via device tree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: linux-kernel@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/10114/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -41,6 +41,7 @@ extern int i8259A_irq_pending(unsigned int irq);
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extern void make_8259A_irq(unsigned int irq);
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extern void init_i8259_irqs(void);
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extern int i8259_of_init(struct device_node *node, struct device_node *parent);
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/*
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* Do the traditional i8259 interrupt polling thing. This is for the few
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@ -14,6 +14,7 @@
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/of_irq.h>
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#include <linux/spinlock.h>
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#include <linux/syscore_ops.h>
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#include <linux/irq.h>
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@ -21,6 +22,8 @@
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#include <asm/i8259.h>
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#include <asm/io.h>
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#include "../../drivers/irqchip/irqchip.h"
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/*
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* This is the 'legacy' 8259A Programmable Interrupt Controller,
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* present in the majority of PC/AT boxes.
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@ -327,7 +330,7 @@ static struct irq_domain_ops i8259A_ops = {
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* driver compatibility reasons interrupts 0 - 15 to be the i8259
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* interrupts even if the hardware uses a different interrupt numbering.
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*/
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void __init init_i8259_irqs(void)
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struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
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{
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struct irq_domain *domain;
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@ -336,10 +339,46 @@ void __init init_i8259_irqs(void)
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init_8259A(0);
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domain = irq_domain_add_legacy(NULL, 16, I8259A_IRQ_BASE, 0,
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domain = irq_domain_add_legacy(node, 16, I8259A_IRQ_BASE, 0,
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&i8259A_ops, NULL);
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if (!domain)
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panic("Failed to add i8259 IRQ domain");
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setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2);
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return domain;
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}
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void __init init_i8259_irqs(void)
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{
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__init_i8259_irqs(NULL);
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}
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static void i8259_irq_dispatch(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_domain *domain = irq_get_handler_data(irq);
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int hwirq = i8259_irq();
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if (hwirq < 0)
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return;
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irq = irq_linear_revmap(domain, hwirq);
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generic_handle_irq(irq);
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}
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int __init i8259_of_init(struct device_node *node, struct device_node *parent)
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{
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struct irq_domain *domain;
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unsigned int parent_irq;
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parent_irq = irq_of_parse_and_map(node, 0);
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if (!parent_irq) {
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pr_err("Failed to map i8259 parent IRQ\n");
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return -ENODEV;
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}
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domain = __init_i8259_irqs(node);
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irq_set_handler_data(parent_irq, domain);
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irq_set_chained_handler(parent_irq, i8259_irq_dispatch);
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return 0;
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}
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IRQCHIP_DECLARE(i8259, "intel,i8259", i8259_of_init);
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