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ARM: mx25: dynamically allocate mxc_pwm devices
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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224b8c8364
commit
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@ -22,63 +22,6 @@
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#include <mach/mx25.h>
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#include <mach/irqs.h>
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static struct resource mxc_pwm_resources0[] = {
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{
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.start = 0x53fe0000,
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.end = 0x53fe3fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 26,
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.end = 26,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_pwm_device0 = {
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.name = "mxc_pwm",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_pwm_resources0),
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.resource = mxc_pwm_resources0,
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};
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static struct resource mxc_pwm_resources1[] = {
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{
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.start = 0x53fa0000,
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.end = 0x53fa3fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 36,
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.end = 36,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_pwm_device1 = {
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.name = "mxc_pwm",
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.id = 1,
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.num_resources = ARRAY_SIZE(mxc_pwm_resources1),
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.resource = mxc_pwm_resources1,
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};
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static struct resource mxc_pwm_resources2[] = {
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{
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.start = 0x53fa8000,
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.end = 0x53fabfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 41,
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.end = 41,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_pwm_device2 = {
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.name = "mxc_pwm",
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.id = 2,
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.num_resources = ARRAY_SIZE(mxc_pwm_resources2),
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.resource = mxc_pwm_resources2,
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};
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static struct resource mxc_keypad_resources[] = {
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{
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.start = 0x43fa8000,
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@ -98,25 +41,6 @@ struct platform_device mxc_keypad_device = {
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.resource = mxc_keypad_resources,
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};
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static struct resource mxc_pwm_resources3[] = {
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{
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.start = 0x53fc8000,
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.end = 0x53fcbfff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 42,
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.end = 42,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device mxc_pwm_device3 = {
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.name = "mxc_pwm",
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.id = 3,
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.num_resources = ARRAY_SIZE(mxc_pwm_resources3),
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.resource = mxc_pwm_resources3,
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};
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static struct mxc_gpio_port imx_gpio_ports[] = {
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{
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.chip.label = "gpio-0",
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@ -1,7 +1,3 @@
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extern struct platform_device mxc_pwm_device0;
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extern struct platform_device mxc_pwm_device1;
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extern struct platform_device mxc_pwm_device2;
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extern struct platform_device mxc_pwm_device3;
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extern struct platform_device mxc_keypad_device;
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extern struct platform_device mx25_rtc_device;
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extern struct platform_device mx25_fb_device;
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@ -9,20 +9,35 @@
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#include <mach/hardware.h>
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#include <mach/devices-common.h>
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#define imx_mxc_pwm_data_entry_single(soc) \
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#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \
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{ \
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.iobase = soc ## _PWM_BASE_ADDR, \
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.irq = soc ## _INT_PWM, \
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.id = _id, \
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.iobase = soc ## _PWM ## _hwid ## _BASE_ADDR, \
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.iosize = _size, \
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.irq = soc ## _INT_PWM ## _hwid, \
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}
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#define imx_mxc_pwm_data_entry(soc, _id, _hwid, _size) \
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[_id] = imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size)
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#ifdef CONFIG_SOC_IMX21
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const struct imx_mxc_pwm_data imx21_mxc_pwm_data __initconst =
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imx_mxc_pwm_data_entry_single(MX21);
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imx_mxc_pwm_data_entry_single(MX21, 0, , SZ_4K);
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#endif /* ifdef CONFIG_SOC_IMX21 */
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#ifdef CONFIG_ARCH_MX25
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const struct imx_mxc_pwm_data imx25_mxc_pwm_data[] __initconst = {
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#define imx25_mxc_pwm_data_entry(_id, _hwid) \
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imx_mxc_pwm_data_entry(MX25, _id, _hwid, SZ_16K)
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imx25_mxc_pwm_data_entry(0, 1),
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imx25_mxc_pwm_data_entry(1, 2),
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imx25_mxc_pwm_data_entry(2, 3),
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imx25_mxc_pwm_data_entry(3, 4),
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};
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#endif
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#ifdef CONFIG_SOC_IMX27
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const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst =
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imx_mxc_pwm_data_entry_single(MX27);
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imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K);
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#endif /* ifdef CONFIG_SOC_IMX27 */
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struct platform_device *__init imx_add_mxc_pwm(
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@ -31,7 +46,7 @@ struct platform_device *__init imx_add_mxc_pwm(
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struct resource res[] = {
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{
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.start = data->iobase,
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.end = data->iobase + SZ_4K - 1,
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.end = data->iobase + data->iosize - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = data->irq,
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@ -40,6 +55,6 @@ struct platform_device *__init imx_add_mxc_pwm(
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},
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};
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return imx_add_platform_device("mxc_pwm", 0,
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return imx_add_platform_device("mxc_pwm", data->id,
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res, ARRAY_SIZE(res), NULL, 0);
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}
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@ -217,7 +217,9 @@ struct platform_device *__init imx_add_mxc_nand(
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const struct mxc_nand_platform_data *pdata);
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struct imx_mxc_pwm_data {
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int id;
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resource_size_t iobase;
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resource_size_t iosize;
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resource_size_t irq;
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};
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struct platform_device *__init imx_add_mxc_pwm(
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@ -19,10 +19,14 @@
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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#define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000)
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#define MX25_GPIO4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x9c000)
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#define MX25_PWM2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa0000)
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#define MX25_GPIO3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa4000)
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#define MX25_PWM3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa8000)
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#define MX25_PWM4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xc8000)
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#define MX25_GPIO1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xcc000)
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#define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000)
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#define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000)
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#define MX25_PWM1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xe0000)
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX25_UART2_BASE_ADDR 0x43f94000
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@ -66,13 +70,17 @@
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#define MX25_INT_UART3 18
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#define MX25_INT_KPP 24
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#define MX25_INT_DRYICE 25
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#define MX25_INT_PWM1 26
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#define MX25_INT_UART2 32
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#define MX25_INT_NFC 33
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#define MX25_INT_SDMA 34
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#define MX25_INT_USB_HS 35
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#define MX25_INT_PWM2 36
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#define MX25_INT_USB_OTG 37
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#define MX25_INT_LCDC 39
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#define MX25_INT_UART5 40
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#define MX25_INT_PWM3 41
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#define MX25_INT_PWM4 42
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#define MX25_INT_CAN1 43
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#define MX25_INT_CAN2 44
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#define MX25_INT_UART1 45
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