Merge branch 'mvebu'

Ezequiel Garcia says:

====================
Network driver for Armada 375 SoC

This is the fourth round of the Armada 375 network support patchset. I've
tried to address all the feedback provided for last version and I hope the
driver looks better now.

If there's nothing else to fix, we'd like to merge this for v3.17. The first
patch should go through the network tree, and the other patches through
the mvebu tree.

Thanks a lot for all the great review, and feel free to comment some more!

Changes from v3:

  * Further optimization of the MTU, MAC and ring parameter change to make
    it smoothier.

  * Lots of cleanups in the parser configuration code, most of them addressing
    the feedback from Francois. This include fixing: missing curly braces,
    excessive parenthesis, excessive scope, and making several functions
    more readable.

  * Removed the Rx/Tx queue number module parameter. There's no reason to
    use any other than the default hardware-defined value.

Changes from v2:

  * Reworked mvpp2_prs_tcam_first_free() as suggested by Joe and Francois,
    to have a single loop instead of two.

  * Replaced mvpp2_cpu_interrupts_enable/disable(pp, cpu) with one function
    that enables/disable interrupts on all the CPUs at once.

  * Factor out Tx descriptor DMA unmap + descriptor put sequence to have
    more readable code, as suggested by Francois.

  * Remove redundant netif_running() checks in the ingress and egress path,
    as suggested by Francois.

  * Reworked ring parameter, MTU and MAC address setting to produce a
    more gentle modification of the parameter, and have a fallback in the
    event of a failure.

  * Fixed a percpu memory leak on error path, also noted by Francois.

  * Removed the usage of the legacy net_device irq field, requested by
    Francois.

  * Removed the unneeded multiple Tx port support. It was hardcoded to a single
    Tx port in the previous version so we decided to drop it and simplify the
    code.

  * Optimize the on_each_cpu() calls to clear the sent counters and the
    TX_DONE pkts coalescing setting. on_each_cpu is expensive so it's better
    to minize the calls to it.

Changes from v1:

  * Marcin Wojtas is the author of the driver, so I fixed authorship
    for patch 1/3:
    "ethernet: Add new driver for Marvell Armada 375 network unit"

This patchset adds a new network driver to support the network controller
in Armada 375 SoC.

The network interfaces share a common hardware unit called Packet Processor,
which contains a common register space and per-port register spaces.

The new network unit has different RXQ and TXQ management. The ports
associate so-called per-port "logical queues" which are mapped to "physical
queues". The latter are shared among the ports.

Fo the egress part, the mapping for each port is predefined by hardware.
The egress path incorporates so-called aggregation queues (one per CPU),
from where the data is passed to the physical queues and then via prefetch
buffer to the TxDMA.

The ingress path has a Parser and Classifier (PnC) and a Buffer Manager (BM)
whose usage is obligatory. We are only implementing a simple configuration
for the Parser and Classifier, yet the code is considerably large.

This network unit has other optional features like xPON, WoL, Hardware
Forwarding, and more. This initial commit doesn't provide support for these.

The mvpp2 network driver has been written by Marcin Wojtas and then reviewed
and cleaned up by Ezequiel Garcia.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2014-07-10 17:19:38 -07:00
commit 5e6438db34
4 changed files with 6463 additions and 0 deletions

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@ -0,0 +1,61 @@
* Marvell Armada 375 Ethernet Controller (PPv2)
Required properties:
- compatible: should be "marvell,armada-375-pp2"
- reg: addresses and length of the register sets for the device.
Must contain the following register sets:
- common controller registers
- LMS registers
In addition, at least one port register set is required.
- clocks: a pointer to the reference clocks for this device, consequently:
- main controller clock
- GOP clock
- clock-names: names of used clocks, must be "pp_clk" and "gop_clk".
The ethernet ports are represented by subnodes. At least one port is
required.
Required properties (port):
- interrupts: interrupt for the port
- port-id: should be '0' or '1' for ethernet ports, and '2' for the
loopback port
- phy-mode: See ethernet.txt file in the same directory
Optional properties (port):
- marvell,loopback: port is loopback mode
- phy: a phandle to a phy node defining the PHY address (as the reg
property, a single integer). Note: if this property isn't present,
then fixed link is assumed, and the 'fixed-link' property is
mandatory.
Example:
ethernet@f0000 {
compatible = "marvell,armada-375-pp2";
reg = <0xf0000 0xa000>,
<0xc0000 0x3060>,
<0xc4000 0x100>,
<0xc5000 0x100>;
clocks = <&gateclk 3>, <&gateclk 19>;
clock-names = "pp_clk", "gop_clk";
status = "okay";
eth0: eth0@c4000 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
port-id = <0>;
status = "okay";
phy = <&phy0>;
phy-mode = "gmii";
};
eth1: eth1@c5000 {
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
port-id = <1>;
status = "okay";
phy = <&phy3>;
phy-mode = "gmii";
};
};

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@ -54,6 +54,14 @@ config MVNETA
driver, which should be used for the older Marvell SoCs
(Dove, Orion, Discovery, Kirkwood).
config MVPP2
tristate "Marvell Armada 375 network interface support"
depends on MACH_ARMADA_375
select MVMDIO
---help---
This driver supports the network interface units in the
Marvell ARMADA 375 SoC.
config PXA168_ETH
tristate "Marvell pxa168 ethernet support"
depends on CPU_PXA168

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@ -5,6 +5,7 @@
obj-$(CONFIG_MVMDIO) += mvmdio.o
obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
obj-$(CONFIG_MVNETA) += mvneta.o
obj-$(CONFIG_MVPP2) += mvpp2.o
obj-$(CONFIG_PXA168_ETH) += pxa168_eth.o
obj-$(CONFIG_SKGE) += skge.o
obj-$(CONFIG_SKY2) += sky2.o

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