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[POWERPC] Add table of contents to booting-without-of.txt

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Add table of contents.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
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Stuart Yoder 2007-06-06 04:29:14 +10:00 committed by Paul Mackerras
parent e5c0b9ec53
commit 5e1e9ba690
1 changed files with 56 additions and 1 deletions
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Documentation/powerpc/booting-without-of.txt
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@ -1,7 +1,6 @@
Booting the Linux/ppc kernel without Open Firmware Booting the Linux/ppc kernel without Open Firmware
-------------------------------------------------- --------------------------------------------------
(c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>, (c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>,
IBM Corp. IBM Corp.
(c) 2005 Becky Bruce <becky.bruce at freescale.com>, (c) 2005 Becky Bruce <becky.bruce at freescale.com>,
@ -9,6 +8,62 @@
(c) 2006 MontaVista Software, Inc. (c) 2006 MontaVista Software, Inc.
Flash chip node definition Flash chip node definition
Table of Contents
=================
I - Introduction
1) Entry point for arch/powerpc
2) Board support
II - The DT block format
1) Header
2) Device tree generalities
3) Device tree "structure" block
4) Device tree "strings" block
III - Required content of the device tree
1) Note about cells and address representation
2) Note about "compatible" properties
3) Note about "name" properties
4) Note about node and property names and character set
5) Required nodes and properties
a) The root node
b) The /cpus node
c) The /cpus/* nodes
d) the /memory node(s)
e) The /chosen node
f) the /soc<SOCname> node
IV - "dtc", the device tree compiler
V - Recommendations for a bootloader
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
a) MDIO IO device
c) PHY nodes
b) Gianfar-compatible ethernet nodes
d) Interrupt controllers
e) I2C
f) Freescale SOC USB controllers
g) Freescale SOC SEC Security Engines
h) Board Control and Status (BCSR)
i) Freescale QUICC Engine module (QE)
g) Flash chip nodes
VII - Specifying interrupt information for devices
1) interrupts property
2) interrupt-parent property
3) OpenPIC Interrupt Controllers
4) ISA Interrupt Controllers
Appendix A - Sample SOC node for MPC8540
Revision Information
====================
May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet. May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet.
May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or