rtc: rtc7301: Rewrite bindings in schema

This rewrites the Epson RTC7301 bindings to use YAML schema,
and adds a property for "reg-io-width" as used in several
other bindings to account for different register strides.

The USRobotics USR8200 uses the byte IO width.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Akinobu Mita <akinobu.mita@gmail.com>
Link: https://lore.kernel.org/r/20231010-rtc-7301-regwidth-v3-1-ade586b62794@linaro.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Linus Walleij 2023-10-10 21:42:11 +02:00 committed by Alexandre Belloni
parent f4d571b31b
commit 5ded578a18
2 changed files with 51 additions and 16 deletions

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@ -1,16 +0,0 @@
EPSON TOYOCOM RTC-7301SF/DG
Required properties:
- compatible: Should be "epson,rtc7301sf" or "epson,rtc7301dg"
- reg: Specifies base physical address and size of the registers.
- interrupts: A single interrupt specifier.
Example:
rtc: rtc@44a00000 {
compatible = "epson,rtc7301dg";
reg = <0x44a00000 0x10000>;
interrupt-parent = <&axi_intc_0>;
interrupts = <3 2>;
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/epson,rtc7301.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Epson Toyocom RTC-7301SF/DG
description:
The only difference between the two variants is the packaging.
The DG variant is a DIL package, and the SF variant is a flat
package.
maintainers:
- Akinobu Mita <akinobu.mita@gmail.com>
properties:
compatible:
enum:
- epson,rtc7301dg
- epson,rtc7301sf
reg:
maxItems: 1
reg-io-width:
description:
The size (in bytes) of the IO accesses that should be performed
on the device.
enum: [1, 4]
default: 4
interrupts:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
rtc: rtc@44a00000 {
compatible = "epson,rtc7301dg";
reg = <0x44a00000 0x10000>;
reg-io-width = <4>;
interrupt-parent = <&axi_intc_0>;
interrupts = <3 2>;
};