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Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 TLB detection update from Ingo Molnar: "A single change that extends our TLB cache size detection+reporting code" * 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, cpu: Detect more TLB configuration
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commit
5d4863e4cc
@ -71,6 +71,7 @@ extern u16 __read_mostly tlb_lli_4m[NR_INFO];
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extern u16 __read_mostly tlb_lld_4k[NR_INFO];
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extern u16 __read_mostly tlb_lld_2m[NR_INFO];
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extern u16 __read_mostly tlb_lld_4m[NR_INFO];
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extern u16 __read_mostly tlb_lld_1g[NR_INFO];
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extern s8 __read_mostly tlb_flushall_shift;
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/*
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@ -472,6 +472,7 @@ u16 __read_mostly tlb_lli_4m[NR_INFO];
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u16 __read_mostly tlb_lld_4k[NR_INFO];
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u16 __read_mostly tlb_lld_2m[NR_INFO];
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u16 __read_mostly tlb_lld_4m[NR_INFO];
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u16 __read_mostly tlb_lld_1g[NR_INFO];
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/*
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* tlb_flushall_shift shows the balance point in replacing cr3 write
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@ -486,13 +487,13 @@ void cpu_detect_tlb(struct cpuinfo_x86 *c)
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if (this_cpu->c_detect_tlb)
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this_cpu->c_detect_tlb(c);
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printk(KERN_INFO "Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n" \
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"Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d\n" \
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printk(KERN_INFO "Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n"
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"Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d, 1GB %d\n"
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"tlb_flushall_shift: %d\n",
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tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES],
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tlb_lli_4m[ENTRIES], tlb_lld_4k[ENTRIES],
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tlb_lld_2m[ENTRIES], tlb_lld_4m[ENTRIES],
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tlb_flushall_shift);
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tlb_lld_1g[ENTRIES], tlb_flushall_shift);
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}
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void detect_ht(struct cpuinfo_x86 *c)
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@ -505,6 +505,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
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#define TLB_DATA0_2M_4M 0x23
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#define STLB_4K 0x41
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#define STLB_4K_2M 0x42
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static const struct _tlb_table intel_tlb_table[] = {
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{ 0x01, TLB_INST_4K, 32, " TLB_INST 4 KByte pages, 4-way set associative" },
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@ -525,13 +526,20 @@ static const struct _tlb_table intel_tlb_table[] = {
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{ 0x5b, TLB_DATA_4K_4M, 64, " TLB_DATA 4 KByte and 4 MByte pages" },
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{ 0x5c, TLB_DATA_4K_4M, 128, " TLB_DATA 4 KByte and 4 MByte pages" },
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{ 0x5d, TLB_DATA_4K_4M, 256, " TLB_DATA 4 KByte and 4 MByte pages" },
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{ 0x61, TLB_INST_4K, 48, " TLB_INST 4 KByte pages, full associative" },
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{ 0x63, TLB_DATA_1G, 4, " TLB_DATA 1 GByte pages, 4-way set associative" },
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{ 0x76, TLB_INST_2M_4M, 8, " TLB_INST 2-MByte or 4-MByte pages, fully associative" },
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{ 0xb0, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 4-way set associative" },
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{ 0xb1, TLB_INST_2M_4M, 4, " TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries" },
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{ 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
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{ 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
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{ 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
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{ 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" },
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{ 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" },
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{ 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
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{ 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
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{ 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
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{ 0xc2, TLB_DATA_2M_4M, 16, " DTLB 2 MByte/4MByte pages, 4-way associative" },
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{ 0xca, STLB_4K, 512, " STLB 4 KByte pages, 4-way associative" },
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{ 0x00, 0, 0 }
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};
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@ -557,6 +565,20 @@ static void intel_tlb_lookup(const unsigned char desc)
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if (tlb_lld_4k[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_4k[ENTRIES] = intel_tlb_table[k].entries;
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break;
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case STLB_4K_2M:
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if (tlb_lli_4k[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lli_4k[ENTRIES] = intel_tlb_table[k].entries;
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if (tlb_lld_4k[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_4k[ENTRIES] = intel_tlb_table[k].entries;
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if (tlb_lli_2m[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lli_2m[ENTRIES] = intel_tlb_table[k].entries;
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if (tlb_lld_2m[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_2m[ENTRIES] = intel_tlb_table[k].entries;
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if (tlb_lli_4m[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lli_4m[ENTRIES] = intel_tlb_table[k].entries;
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if (tlb_lld_4m[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_4m[ENTRIES] = intel_tlb_table[k].entries;
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break;
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case TLB_INST_ALL:
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if (tlb_lli_4k[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lli_4k[ENTRIES] = intel_tlb_table[k].entries;
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@ -602,6 +624,10 @@ static void intel_tlb_lookup(const unsigned char desc)
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if (tlb_lld_4m[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_4m[ENTRIES] = intel_tlb_table[k].entries;
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break;
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case TLB_DATA_1G:
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if (tlb_lld_1g[ENTRIES] < intel_tlb_table[k].entries)
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tlb_lld_1g[ENTRIES] = intel_tlb_table[k].entries;
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break;
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}
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}
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