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spi: spi-fsl-dspi: Provide support for DSPI slave mode operation (Vybryd vf610)

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The NXP's Vybryd vf610 can work as a SPI slave device (the CS and clock
signals are provided by master).

It is possible to specify a single device to work in that mode. As we do
use DMA for transferring data, the RX channel must be prepared for
incoming data.
Moreover, in slave mode we just set a subset of control fields in
configuration registers (CTAR0, PUSHR).

For testing the spidev_test program has been used.
Test script for this patch can be found here:
https://github.com/lmajewski/tests-spi/blob/master/tests/spi/spi_tests.sh

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Lukasz Majewski 2019-02-05 23:13:49 +01:00 committed by Mark Brown
parent 473a78a7bb
commit 5ce3cc5674
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 30 additions and 10 deletions
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40
drivers/spi/spi-fsl-dspi.c
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@ -233,6 +233,9 @@ static u32 dspi_pop_tx_pushr(struct fsl_dspi *dspi)
{ {
u16 cmd = dspi->tx_cmd, data = dspi_pop_tx(dspi); u16 cmd = dspi->tx_cmd, data = dspi_pop_tx(dspi);
if (spi_controller_is_slave(dspi->master))
return data;
if (dspi->len > 0) if (dspi->len > 0)
cmd |= SPI_PUSHR_CMD_CONT; cmd |= SPI_PUSHR_CMD_CONT;
return cmd << 16 | data; return cmd << 16 | data;
@ -329,6 +332,11 @@ static int dspi_next_xfer_dma_submit(struct fsl_dspi *dspi)
dma_async_issue_pending(dma->chan_rx); dma_async_issue_pending(dma->chan_rx);
dma_async_issue_pending(dma->chan_tx); dma_async_issue_pending(dma->chan_tx);
if (spi_controller_is_slave(dspi->master)) {
wait_for_completion_interruptible(&dspi->dma->cmd_rx_complete);
return 0;
}
time_left = wait_for_completion_timeout(&dspi->dma->cmd_tx_complete, time_left = wait_for_completion_timeout(&dspi->dma->cmd_tx_complete,
DMA_COMPLETION_TIMEOUT); DMA_COMPLETION_TIMEOUT);
if (time_left == 0) { if (time_left == 0) {
@ -798,14 +806,18 @@ static int dspi_setup(struct spi_device *spi)
ns_delay_scale(&pasc, &asc, sck_cs_delay, clkrate); ns_delay_scale(&pasc, &asc, sck_cs_delay, clkrate);
chip->ctar_val = SPI_CTAR_CPOL(spi->mode & SPI_CPOL ? 1 : 0) chip->ctar_val = SPI_CTAR_CPOL(spi->mode & SPI_CPOL ? 1 : 0)
| SPI_CTAR_CPHA(spi->mode & SPI_CPHA ? 1 : 0) | SPI_CTAR_CPHA(spi->mode & SPI_CPHA ? 1 : 0);
| SPI_CTAR_LSBFE(spi->mode & SPI_LSB_FIRST ? 1 : 0)
| SPI_CTAR_PCSSCK(pcssck) if (!spi_controller_is_slave(dspi->master)) {
| SPI_CTAR_CSSCK(cssck) chip->ctar_val |= SPI_CTAR_LSBFE(spi->mode &
| SPI_CTAR_PASC(pasc) SPI_LSB_FIRST ? 1 : 0)
| SPI_CTAR_ASC(asc) | SPI_CTAR_PCSSCK(pcssck)
| SPI_CTAR_PBR(pbr) | SPI_CTAR_CSSCK(cssck)
| SPI_CTAR_BR(br); | SPI_CTAR_PASC(pasc)
| SPI_CTAR_ASC(asc)
| SPI_CTAR_PBR(pbr)
| SPI_CTAR_BR(br);
}
spi_set_ctldata(spi, chip); spi_set_ctldata(spi, chip);
@ -970,8 +982,13 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
static void dspi_init(struct fsl_dspi *dspi) static void dspi_init(struct fsl_dspi *dspi)
{ {
regmap_write(dspi->regmap, SPI_MCR, SPI_MCR_MASTER | SPI_MCR_PCSIS | unsigned int mcr = SPI_MCR_PCSIS |
(dspi->devtype_data->xspi_mode ? SPI_MCR_XSPI : 0)); (dspi->devtype_data->xspi_mode ? SPI_MCR_XSPI : 0);
if (!spi_controller_is_slave(dspi->master))
mcr |= SPI_MCR_MASTER;
regmap_write(dspi->regmap, SPI_MCR, mcr);
regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR); regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR);
if (dspi->devtype_data->xspi_mode) if (dspi->devtype_data->xspi_mode)
regmap_write(dspi->regmap, SPI_CTARE(0), regmap_write(dspi->regmap, SPI_CTARE(0),
@ -1027,6 +1044,9 @@ static int dspi_probe(struct platform_device *pdev)
} }
master->bus_num = bus_num; master->bus_num = bus_num;
if (of_property_read_bool(np, "spi-slave"))
master->slave = true;
dspi->devtype_data = of_device_get_match_data(&pdev->dev); dspi->devtype_data = of_device_get_match_data(&pdev->dev);
if (!dspi->devtype_data) { if (!dspi->devtype_data) {
dev_err(&pdev->dev, "can't get devtype_data\n"); dev_err(&pdev->dev, "can't get devtype_data\n");