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iio: frequency: ad9523: Fix typo in ad9523_platform_data

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Replace diff_{m1,m2} with div_{m1,m2} since they are dividers and not a
differential settings.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Lars-Peter Clausen 2019-03-26 15:40:03 +02:00 committed by Jonathan Cameron
parent 89c16919a0
commit 5cd6623957
2 changed files with 12 additions and 12 deletions
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16
drivers/iio/frequency/ad9523.c
View File

@ -872,22 +872,22 @@ static int ad9523_setup(struct iio_dev *indio_dev)
return ret;
ret = ad9523_write(indio_dev, AD9523_PLL2_VCO_DIVIDER,
AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_diff_m1) |
AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_diff_m2) |
AD_IFE(pll2_vco_diff_m1, 0,
AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_div_m1) |
AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_div_m2) |
AD_IFE(pll2_vco_div_m1, 0,
AD9523_PLL2_VCO_DIV_M1_PWR_DOWN_EN) |
AD_IFE(pll2_vco_diff_m2, 0,
AD_IFE(pll2_vco_div_m2, 0,
AD9523_PLL2_VCO_DIV_M2_PWR_DOWN_EN));
if (ret < 0)
return ret;
if (pdata->pll2_vco_diff_m1)
if (pdata->pll2_vco_div_m1)
st->vco_out_freq[AD9523_VCO1] =
st->vco_freq / pdata->pll2_vco_diff_m1;
st->vco_freq / pdata->pll2_vco_div_m1;
if (pdata->pll2_vco_diff_m2)
if (pdata->pll2_vco_div_m2)
st->vco_out_freq[AD9523_VCO2] =
st->vco_freq / pdata->pll2_vco_diff_m2;
st->vco_freq / pdata->pll2_vco_div_m2;
st->vco_out_freq[AD9523_VCXO] = pdata->vcxo_freq;

8
include/linux/iio/frequency/ad9523.h
View File

@ -129,8 +129,8 @@ enum cpole1_capacitor {
* @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63.
* @pll2_freq_doubler_en: PLL2 frequency doubler enable.
* @pll2_r2_div: PLL2 R2 divider, range 0..31.
* @pll2_vco_diff_m1: VCO1 divider, range 3..5.
* @pll2_vco_diff_m2: VCO2 divider, range 3..5.
* @pll2_vco_div_m1: VCO1 divider, range 3..5.
* @pll2_vco_div_m2: VCO2 divider, range 3..5.
* @rpole2: PLL2 loop filter Rpole resistor value.
* @rzero: PLL2 loop filter Rzero resistor value.
* @cpole1: PLL2 loop filter Cpole capacitor value.
@ -176,8 +176,8 @@ struct ad9523_platform_data {
unsigned char pll2_ndiv_b_cnt;
bool pll2_freq_doubler_en;
unsigned char pll2_r2_div;
unsigned char pll2_vco_diff_m1; /* 3..5 */
unsigned char pll2_vco_diff_m2; /* 3..5 */
unsigned char pll2_vco_div_m1; /* 3..5 */
unsigned char pll2_vco_div_m2; /* 3..5 */
/* Loop Filter PLL2 */
enum rpole2_resistor rpole2;