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drm/i915/dp_mst: Enable LT fallback between UHBR/non-UHBR link rates

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Enable switching between UHBR and non-UHBR link rates on MST links when
reducing the link parameters after an LT failure.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240722165503.2084999-15-imre.deak@intel.com
This commit is contained in:
Imre Deak 2024-07-22 19:55:03 +03:00
parent e44bc451aa
commit 5c7b393452
1 changed files with 0 additions and 5 deletions
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5
drivers/gpu/drm/i915/display/intel_dp_link_training.c
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@ -1188,11 +1188,6 @@ static bool reduce_link_params_in_bw_order(struct intel_dp *intel_dp,
intel_dp->link.force_lane_count != lane_count))
continue;
/* TODO: Make switching from UHBR to non-UHBR rates work. */
if (drm_dp_is_uhbr_rate(crtc_state->port_clock) !=
drm_dp_is_uhbr_rate(link_rate))
continue;
break;
}