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spi: pxa2xx: Remove DMA parameters from struct chip_data

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The DMA related fields are set once and never modified. It effectively
repeats the content of the same fields in struct pxa2xx_spi_controller.
With that, remove DMA parameters from struct chip_data.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240417110334.2671228-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Andy Shevchenko 2024-04-17 13:54:34 +03:00 committed by Mark Brown
parent 513525e998
commit 5c5de36d04
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
3 changed files with 9 additions and 61 deletions
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22
drivers/spi/spi-pxa2xx-dma.c
View File

@ -68,8 +68,6 @@ pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
enum dma_transfer_direction dir, enum dma_transfer_direction dir,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
struct chip_data *chip =
spi_get_ctldata(drv_data->controller->cur_msg->spi);
enum dma_slave_buswidth width; enum dma_slave_buswidth width;
struct dma_slave_config cfg; struct dma_slave_config cfg;
struct dma_chan *chan; struct dma_chan *chan;
@ -94,14 +92,14 @@ pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
if (dir == DMA_MEM_TO_DEV) { if (dir == DMA_MEM_TO_DEV) {
cfg.dst_addr = drv_data->ssp->phys_base + SSDR; cfg.dst_addr = drv_data->ssp->phys_base + SSDR;
cfg.dst_addr_width = width; cfg.dst_addr_width = width;
cfg.dst_maxburst = chip->dma_burst_size; cfg.dst_maxburst = drv_data->controller_info->dma_burst_size;
sgt = &xfer->tx_sg; sgt = &xfer->tx_sg;
chan = drv_data->controller->dma_tx; chan = drv_data->controller->dma_tx;
} else { } else {
cfg.src_addr = drv_data->ssp->phys_base + SSDR; cfg.src_addr = drv_data->ssp->phys_base + SSDR;
cfg.src_addr_width = width; cfg.src_addr_width = width;
cfg.src_maxburst = chip->dma_burst_size; cfg.src_maxburst = drv_data->controller_info->dma_burst_size;
sgt = &xfer->rx_sg; sgt = &xfer->rx_sg;
chan = drv_data->controller->dma_rx; chan = drv_data->controller->dma_rx;
@ -225,19 +223,3 @@ void pxa2xx_spi_dma_release(struct driver_data *drv_data)
controller->dma_tx = NULL; controller->dma_tx = NULL;
} }
} }
int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
struct spi_device *spi,
u8 bits_per_word, u32 *burst_code,
u32 *threshold)
{
struct driver_data *drv_data = spi_controller_get_devdata(spi->controller);
u32 dma_burst_size = drv_data->controller_info->dma_burst_size;
/* We use the default the DMA burst size and FIFO thresholds for now */
*burst_code = dma_burst_size;
*threshold = SSCR1_RxTresh(RX_THRESH_DFLT)
| SSCR1_TxTresh(TX_THRESH_DFLT);
return 0;
}

40
drivers/spi/spi-pxa2xx.c
View File

@ -934,11 +934,11 @@ static bool pxa2xx_spi_can_dma(struct spi_controller *controller,
struct spi_device *spi, struct spi_device *spi,
struct spi_transfer *xfer) struct spi_transfer *xfer)
{ {
struct chip_data *chip = spi_get_ctldata(spi); struct driver_data *drv_data = spi_controller_get_devdata(controller);
return chip->enable_dma && return drv_data->controller_info->enable_dma &&
xfer->len <= MAX_DMA_LEN && xfer->len <= MAX_DMA_LEN &&
xfer->len >= chip->dma_burst_size; xfer->len >= drv_data->controller_info->dma_burst_size;
} }
static int pxa2xx_spi_transfer_one(struct spi_controller *controller, static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
@ -947,9 +947,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
{ {
struct driver_data *drv_data = spi_controller_get_devdata(controller); struct driver_data *drv_data = spi_controller_get_devdata(controller);
struct chip_data *chip = spi_get_ctldata(spi); struct chip_data *chip = spi_get_ctldata(spi);
u32 dma_thresh = chip->dma_threshold;
u32 dma_burst = chip->dma_burst_size;
u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data); u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask(drv_data);
u32 dma_thresh;
u32 clk_div; u32 clk_div;
u8 bits; u8 bits;
u32 speed; u32 speed;
@ -959,7 +958,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
int dma_mapped; int dma_mapped;
/* Check if we can DMA this transfer */ /* Check if we can DMA this transfer */
if (transfer->len > MAX_DMA_LEN && chip->enable_dma) { if (transfer->len > MAX_DMA_LEN && drv_data->controller_info->enable_dma) {
/* Warn ... we force this to PIO mode */ /* Warn ... we force this to PIO mode */
dev_warn_ratelimited(&spi->dev, dev_warn_ratelimited(&spi->dev,
"DMA disabled for transfer length %u greater than %d\n", "DMA disabled for transfer length %u greater than %d\n",
@ -995,19 +994,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
drv_data->read = drv_data->rx ? u32_reader : null_reader; drv_data->read = drv_data->rx ? u32_reader : null_reader;
drv_data->write = drv_data->tx ? u32_writer : null_writer; drv_data->write = drv_data->tx ? u32_writer : null_writer;
} }
/*
* If bits per word is changed in DMA mode, then must check
* the thresholds and burst also.
*/
if (chip->enable_dma) {
if (pxa2xx_spi_set_dma_burst_and_threshold(chip,
spi,
bits, &dma_burst,
&dma_thresh))
dev_warn_ratelimited(&spi->dev,
"DMA burst size reduced to match bits_per_word\n");
}
dma_thresh = SSCR1_RxTresh(RX_THRESH_DFLT) | SSCR1_TxTresh(TX_THRESH_DFLT);
dma_mapped = controller->can_dma && dma_mapped = controller->can_dma &&
controller->can_dma(controller, spi, transfer) && controller->can_dma(controller, spi, transfer) &&
controller->cur_msg_mapped; controller->cur_msg_mapped;
@ -1213,7 +1201,6 @@ static int setup(struct spi_device *spi)
if (!chip) if (!chip)
return -ENOMEM; return -ENOMEM;
chip->enable_dma = drv_data->controller_info->enable_dma;
chip->timeout = TIMOUT_DFLT; chip->timeout = TIMOUT_DFLT;
} }
@ -1236,20 +1223,6 @@ static int setup(struct spi_device *spi)
chip->lpss_tx_threshold = tx_thres; chip->lpss_tx_threshold = tx_thres;
} }
if (chip->enable_dma) {
/* Set up legal burst and threshold for DMA */
if (pxa2xx_spi_set_dma_burst_and_threshold(chip, spi,
spi->bits_per_word,
&chip->dma_burst_size,
&chip->dma_threshold)) {
dev_warn(&spi->dev,
"in setup: DMA burst size reduced to match bits_per_word\n");
}
dev_dbg(&spi->dev,
"in setup: DMA burst size set to %u\n",
chip->dma_burst_size);
}
switch (drv_data->ssp_type) { switch (drv_data->ssp_type) {
case QUARK_X1000_SSP: case QUARK_X1000_SSP:
chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres) chip->threshold = (QUARK_X1000_SSCR1_RxTresh(rx_thres)
@ -1439,6 +1412,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
if (IS_ERR(platform_info)) if (IS_ERR(platform_info))
return dev_err_probe(dev, PTR_ERR(platform_info), "missing platform data\n"); return dev_err_probe(dev, PTR_ERR(platform_info), "missing platform data\n");
} }
dev_dbg(dev, "DMA burst size set to %u\n", platform_info->dma_burst_size);
ssp = pxa_ssp_request(pdev->id, pdev->name); ssp = pxa_ssp_request(pdev->id, pdev->name);
if (!ssp) if (!ssp)

8
drivers/spi/spi-pxa2xx.h
View File

@ -79,9 +79,6 @@ struct chip_data {
u32 cr1; u32 cr1;
u32 dds_rate; u32 dds_rate;
u32 timeout; u32 timeout;
u8 enable_dma;
u32 dma_burst_size;
u32 dma_threshold;
u32 threshold; u32 threshold;
u16 lpss_rx_threshold; u16 lpss_rx_threshold;
u16 lpss_tx_threshold; u16 lpss_tx_threshold;
@ -142,10 +139,5 @@ extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data); extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data); extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
extern void pxa2xx_spi_dma_release(struct driver_data *drv_data); extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
struct spi_device *spi,
u8 bits_per_word,
u32 *burst_code,
u32 *threshold);
#endif /* SPI_PXA2XX_H */ #endif /* SPI_PXA2XX_H */