From 5c5ba218c6dc1e469b2796345935b8b758162b66 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Sun, 18 Aug 2019 18:23:44 +0200 Subject: [PATCH] clk: bcm2835: Mark PLLD_PER as CRITICAL The VPU firmware assume that the PLLD_PER isn't modified by the ARM core. Otherwise this could cause firmware lookups. So mark the clock as critical to avoid this. Signed-off-by: Stefan Wahren Reviewed-by: Eric Anholt --- drivers/clk/bcm/clk-bcm2835.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index fdf672a7219e..802e488fd3c3 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -1776,6 +1776,11 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .hold_mask = CM_PLLD_HOLDCORE, .fixed_divider = 1, .flags = CLK_SET_RATE_PARENT), + /* + * VPU firmware assumes that PLLD_PER isn't disabled by the ARM core. + * Otherwise this could cause firmware lookups. That's why we mark + * it as critical. + */ [BCM2835_PLLD_PER] = REGISTER_PLL_DIV( SOC_ALL, .name = "plld_per", @@ -1785,7 +1790,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = { .load_mask = CM_PLLD_LOADPER, .hold_mask = CM_PLLD_HOLDPER, .fixed_divider = 1, - .flags = CLK_SET_RATE_PARENT), + .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( SOC_ALL, .name = "plld_dsi0",