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Merge master.kernel.org:~rmk/linux-2.6-arm.git

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This commit is contained in:
Linus Torvalds 2005-07-10 12:57:49 -07:00
commit 5c23804a09
65 changed files with 1847 additions and 1133 deletions
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6
arch/arm/Kconfig
View File

@ -223,7 +223,9 @@ source "arch/arm/mach-pxa/Kconfig"
source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/mach-omap/Kconfig"
source "arch/arm/plat-omap/Kconfig"
source "arch/arm/mach-omap1/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig"
@ -514,7 +516,7 @@ config XIP_PHYS_ADDR
endmenu
if (ARCH_SA1100 || ARCH_INTEGRATOR)
if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
menu "CPU Frequency scaling"

6
arch/arm/Makefile
View File

@ -91,7 +91,8 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000
machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
machine-$(CONFIG_ARCH_IXP2000) := ixp2000
machine-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_OMAP1) := omap1
incdir-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_S3C2410) := s3c2410
machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x
machine-$(CONFIG_ARCH_VERSATILE) := versatile
@ -142,6 +143,9 @@ core-$(CONFIG_FPE_NWFPE) += arch/arm/nwfpe/
core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ)
core-$(CONFIG_VFP) += arch/arm/vfp/
# If we have a common platform directory, then include it in the build.
core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/
drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/
drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/
drivers-$(CONFIG_ARCH_L7200) += drivers/acorn/char/

20
arch/arm/configs/enp2611_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-git6
# Sat Jun 25 00:57:29 2005
# Linux kernel version: 2.6.13-rc2
# Thu Jul 7 16:41:21 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -137,6 +137,7 @@ CONFIG_PCI_NAMES=y
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
@ -345,10 +346,9 @@ CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -363,17 +363,8 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_TUNNEL is not set
# CONFIG_IP_TCPDIAG is not set
# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# TCP congestion control
#
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -931,4 +922,3 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_TEXTSEARCH is not set

20
arch/arm/configs/ixdp2400_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-git6
# Sat Jun 25 00:58:38 2005
# Linux kernel version: 2.6.13-rc2
# Thu Jul 7 16:49:01 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_TUNNEL is not set
# CONFIG_IP_TCPDIAG is not set
# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# TCP congestion control
#
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -932,4 +923,3 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_TEXTSEARCH is not set

20
arch/arm/configs/ixdp2401_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-git6
# Sat Jun 25 00:59:35 2005
# Linux kernel version: 2.6.13-rc2
# Thu Jul 7 16:49:08 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# TCP congestion control
#
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -933,4 +924,3 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_TEXTSEARCH is not set

20
arch/arm/configs/ixdp2800_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-git6
# Sat Jun 25 01:00:27 2005
# Linux kernel version: 2.6.13-rc2
# Thu Jul 7 16:49:20 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_TUNNEL is not set
# CONFIG_IP_TCPDIAG is not set
# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# TCP congestion control
#
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -932,4 +923,3 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_TEXTSEARCH is not set

20
arch/arm/configs/ixdp2801_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-git6
# Sat Jun 25 01:01:18 2005
# Linux kernel version: 2.6.13-rc2
# Thu Jul 7 16:49:13 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
@ -138,6 +138,7 @@ CONFIG_PCI_NAMES=y
#
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
@ -346,10 +347,9 @@ CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_FIB_TRIE is not set
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -364,17 +364,8 @@ CONFIG_SYN_COOKIES=y
# CONFIG_INET_TUNNEL is not set
# CONFIG_IP_TCPDIAG is not set
# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# TCP congestion control
#
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
CONFIG_TCP_CONG_WESTWOOD=m
CONFIG_TCP_CONG_HTCP=m
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
# CONFIG_TCP_CONG_VEGAS is not set
# CONFIG_TCP_CONG_SCALABLE is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -933,4 +924,3 @@ CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
# CONFIG_TEXTSEARCH is not set

117
arch/arm/configs/omap_h2_1610_defconfig
View File

@ -1,14 +1,13 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-rc1-bk2
# Sun Mar 27 17:52:41 2005
# Linux kernel version: 2.6.13-rc2
# Fri Jul 8 04:49:34 2005
#
CONFIG_ARM=y
CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_IOMAP=y
#
# Code maturity level options
@ -17,6 +16,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@ -33,8 +33,9 @@ CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
@ -82,10 +83,28 @@ CONFIG_ARCH_OMAP=y
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
#
# TI OMAP Implementations
#
CONFIG_ARCH_OMAP_OTG=y
CONFIG_ARCH_OMAP1=y
# CONFIG_ARCH_OMAP2 is not set
#
# OMAP Feature Selections
#
# CONFIG_OMAP_RESET_CLOCKS is not set
CONFIG_OMAP_MUX=y
# CONFIG_OMAP_MUX_DEBUG is not set
CONFIG_OMAP_MUX_WARNINGS=y
# CONFIG_OMAP_MPU_TIMER is not set
CONFIG_OMAP_32K_TIMER=y
CONFIG_OMAP_32K_TIMER_HZ=128
CONFIG_OMAP_LL_DEBUG_UART1=y
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
# CONFIG_OMAP_LL_DEBUG_UART3 is not set
#
# OMAP Core Type
@ -93,7 +112,6 @@ CONFIG_ARCH_OMAP=y
# CONFIG_ARCH_OMAP730 is not set
# CONFIG_ARCH_OMAP1510 is not set
CONFIG_ARCH_OMAP16XX=y
CONFIG_ARCH_OMAP_OTG=y
#
# OMAP Board Type
@ -101,21 +119,14 @@ CONFIG_ARCH_OMAP_OTG=y
# CONFIG_MACH_OMAP_INNOVATOR is not set
CONFIG_MACH_OMAP_H2=y
# CONFIG_MACH_OMAP_H3 is not set
# CONFIG_MACH_OMAP_H4 is not set
# CONFIG_MACH_OMAP_OSK is not set
# CONFIG_MACH_OMAP_GENERIC is not set
#
# OMAP Feature Selections
# OMAP CPU Speed
#
CONFIG_OMAP_MUX=y
# CONFIG_OMAP_MUX_DEBUG is not set
CONFIG_OMAP_MUX_WARNINGS=y
CONFIG_OMAP_MPU_TIMER=y
# CONFIG_OMAP_32K_TIMER is not set
CONFIG_OMAP_LL_DEBUG_UART1=y
# CONFIG_OMAP_LL_DEBUG_UART2 is not set
# CONFIG_OMAP_LL_DEBUG_UART3 is not set
# CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER is not set
# CONFIG_OMAP_ARM_216MHZ is not set
CONFIG_OMAP_ARM_192MHZ=y
# CONFIG_OMAP_ARM_168MHZ is not set
# CONFIG_OMAP_ARM_120MHZ is not set
@ -145,6 +156,7 @@ CONFIG_ARM_THUMB=y
#
# Bus support
#
CONFIG_ISA_DMA_API=y
#
# PCCARD (PCMCIA/CardBus) support
@ -154,7 +166,16 @@ CONFIG_ARM_THUMB=y
#
# Kernel Features
#
# CONFIG_SMP is not set
CONFIG_PREEMPT=y
CONFIG_NO_IDLE_HZ=y
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
@ -166,6 +187,22 @@ CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="mem=32M console=ttyS0,115200n8 root=0801 ro init=/bin/sh"
# CONFIG_XIP_KERNEL is not set
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_TABLE=y
# CONFIG_CPU_FREQ_DEBUG is not set
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
CONFIG_CPU_FREQ_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
#
# Floating point emulation
#
@ -202,7 +239,6 @@ CONFIG_PM=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
CONFIG_DEBUG_DRIVER=y
#
# Memory Technology Devices (MTD)
@ -292,7 +328,6 @@ CONFIG_MTD_CFI_UTIL=y
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
@ -327,6 +362,7 @@ CONFIG_SCSI_PROC_FS=y
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@ -356,6 +392,7 @@ CONFIG_SCSI_PROC_FS=y
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
@ -375,12 +412,12 @@ CONFIG_NET=y
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
@ -395,6 +432,8 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
@ -442,6 +481,7 @@ CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_SMC91X=y
# CONFIG_DM9000 is not set
#
# Ethernet (1000 Mbit)
@ -518,7 +558,6 @@ CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
#
# Character devices
@ -567,13 +606,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
#
# Ftape, the floppy tape device driver
#
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
@ -604,7 +641,9 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_FSCPOS is not set
@ -620,6 +659,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
@ -627,15 +667,21 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
#
# Other I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_RTC8564 is not set
CONFIG_ISP1301_OMAP=y
CONFIG_TPS65010=y
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
@ -663,8 +709,10 @@ CONFIG_FB=y
# CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set
# CONFIG_FB_SOFT_CURSOR is not set
# CONFIG_FB_MACMODES is not set
CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
#
@ -677,11 +725,13 @@ CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_7x14 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FONT_MINI_4x6 is not set
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_10x18 is not set
#
# Logo configuration
@ -729,14 +779,14 @@ CONFIG_USB_ARCH_HAS_OHCI=y
#
CONFIG_USB_GADGET=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
CONFIG_USB_GADGET_SELECTED=y
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_SA1100 is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
CONFIG_USB_GADGET_OMAP=y
CONFIG_USB_OMAP=y
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_GADGET_DUALSPEED is not set
# CONFIG_USB_ZERO is not set
CONFIG_USB_ETH=y
@ -755,6 +805,7 @@ CONFIG_USB_ETH_RNDIS=y
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
@ -791,7 +842,6 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437
#
CONFIG_PROC_FS=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
@ -828,12 +878,14 @@ CONFIG_CRAMFS=y
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
@ -903,24 +955,11 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_DEBUG_PREEMPT=y
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_USER=y
# CONFIG_DEBUG_WAITQ is not set
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
# CONFIG_DEBUG_USER is not set
#
# Security options

55
arch/arm/mach-ixp2000/core.c
View File

@ -23,7 +23,7 @@
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/bitops.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
#include <linux/mm.h>
#include <asm/types.h>
@ -125,19 +125,6 @@ static struct map_desc ixp2000_io_desc[] __initdata = {
}
};
static struct uart_port ixp2000_serial_port = {
.membase = (char *)(IXP2000_UART_VIRT_BASE + 3),
.mapbase = IXP2000_UART_PHYS_BASE + 3,
.irq = IRQ_IXP2000_UART,
.flags = UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 50000000,
.line = 0,
.type = PORT_XSCALE,
.fifosize = 16
};
void __init ixp2000_map_io(void)
{
extern unsigned int processor_id;
@ -157,12 +144,50 @@ void __init ixp2000_map_io(void)
}
iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
early_serial_setup(&ixp2000_serial_port);
/* Set slowport to 8-bit mode. */
ixp2000_reg_write(IXP2000_SLOWPORT_FRM, 1);
}
/*************************************************************************
* Serial port support for IXP2000
*************************************************************************/
static struct plat_serial8250_port ixp2000_serial_port[] = {
{
.mapbase = IXP2000_UART_PHYS_BASE,
.membase = (char *)(IXP2000_UART_VIRT_BASE + 3),
.irq = IRQ_IXP2000_UART,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 50000000,
},
{ },
};
static struct resource ixp2000_uart_resource = {
.start = IXP2000_UART_PHYS_BASE,
.end = IXP2000_UART_PHYS_BASE + 0xffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device ixp2000_serial_device = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = ixp2000_serial_port,
},
.num_resources = 1,
.resource = &ixp2000_uart_resource,
};
void __init ixp2000_uart_init(void)
{
platform_device_register(&ixp2000_serial_device);
}
/*************************************************************************
* Timer-tick functions for IXP2000
*************************************************************************/

1
arch/arm/mach-ixp2000/enp2611.c
View File

@ -219,6 +219,7 @@ static struct platform_device *enp2611_devices[] __initdata = {
static void __init enp2611_init_machine(void)
{
platform_add_devices(enp2611_devices, ARRAY_SIZE(enp2611_devices));
ixp2000_uart_init();
}

1
arch/arm/mach-ixp2000/ixdp2x00.c
View File

@ -303,5 +303,6 @@ void __init ixdp2x00_init_machine(void)
gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
ixp2000_uart_init();
}

1
arch/arm/mach-ixp2000/ixdp2x01.c
View File

@ -370,6 +370,7 @@ static void __init ixdp2x01_init_machine(void)
((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1);
platform_add_devices(ixdp2x01_devices, ARRAY_SIZE(ixdp2x01_devices));
ixp2000_uart_init();
}

221
arch/arm/mach-omap/Kconfig
View File

@ -1,221 +0,0 @@
if ARCH_OMAP
menu "TI OMAP Implementations"
comment "OMAP Core Type"
config ARCH_OMAP730
depends on ARCH_OMAP
bool "OMAP730 Based System"
select ARCH_OMAP_OTG
config ARCH_OMAP1510
depends on ARCH_OMAP
default y
bool "OMAP1510 Based System"
config ARCH_OMAP16XX
depends on ARCH_OMAP
bool "OMAP16XX Based System"
select ARCH_OMAP_OTG
config ARCH_OMAP_OTG
bool
comment "OMAP Board Type"
config MACH_OMAP_INNOVATOR
bool "TI Innovator"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX
help
TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
have such a board.
config MACH_OMAP_H2
bool "TI H2 Support"
depends on ARCH_OMAP16XX
help
TI OMAP 1610/1611B H2 board support. Say Y here if you have such
a board.
config MACH_OMAP_H3
bool "TI H3 Support"
depends on ARCH_OMAP16XX
help
TI OMAP 1710 H3 board support. Say Y here if you have such
a board.
config MACH_OMAP_H4
bool "TI H4 Support"
depends on ARCH_OMAP16XX
help
TI OMAP 1610 H4 board support. Say Y here if you have such
a board.
config MACH_OMAP_OSK
bool "TI OSK Support"
depends on ARCH_OMAP16XX
help
TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here
if you have such a board.
config MACH_OMAP_PERSEUS2
bool "TI Perseus2"
depends on ARCH_OMAP730
help
Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
a board.
config MACH_VOICEBLUE
bool "Voiceblue"
depends on ARCH_OMAP1510
help
Support for Voiceblue GSM/VoIP gateway. Say Y here if you have such
board.
config MACH_NETSTAR
bool "NetStar"
depends on ARCH_OMAP1510
help
Support for NetStar PBX. Say Y here if you have such a board.
config MACH_OMAP_GENERIC
bool "Generic OMAP board"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX
help
Support for generic OMAP-1510, 1610 or 1710 board with
no FPGA. Can be used as template for porting Linux to
custom OMAP boards. Say Y here if you have a custom
board.
comment "OMAP Feature Selections"
#config OMAP_BOOT_TAG
# bool "OMAP bootloader information passing"
# depends on ARCH_OMAP
# default n
# help
# Say Y, if you have a bootloader which passes information
# about your board and its peripheral configuration.
config OMAP_MUX
bool "OMAP multiplexing support"
depends on ARCH_OMAP
default y
help
Pin multiplexing support for OMAP boards. If your bootloader
sets the multiplexing correctly, say N. Otherwise, or if unsure,
say Y.
config OMAP_MUX_DEBUG
bool "Multiplexing debug output"
depends on OMAP_MUX
default n
help
Makes the multiplexing functions print out a lot of debug info.
This is useful if you want to find out the correct values of the
multiplexing registers.
config OMAP_MUX_WARNINGS
bool "Warn about pins the bootloader didn't set up"
depends on OMAP_MUX
default y
help
Choose Y here to warn whenever driver initialization logic needs
to change the pin multiplexing setup. When there are no warnings
printed, it's safe to deselect OMAP_MUX for your product.
choice
prompt "System timer"
default OMAP_MPU_TIMER
config OMAP_MPU_TIMER
bool "Use mpu timer"
help
Select this option if you want to use the OMAP mpu timer. This
timer provides more intra-tick resolution than the 32KHz timer,
but consumes more power.
config OMAP_32K_TIMER
bool "Use 32KHz timer"
depends on ARCH_OMAP16XX
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP-16xx.
endchoice
config OMAP_32K_TIMER_HZ
int "Kernel internal timer frequency for 32KHz timer"
range 32 1024
depends on OMAP_32K_TIMER
default "128"
help
Kernel internal timer frequency should be a divisor of 32768,
such as 64 or 128.
choice
prompt "Low-level debug console UART"
depends on ARCH_OMAP
default OMAP_LL_DEBUG_UART1
config OMAP_LL_DEBUG_UART1
bool "UART1"
config OMAP_LL_DEBUG_UART2
bool "UART2"
config OMAP_LL_DEBUG_UART3
bool "UART3"
endchoice
config OMAP_ARM_195MHZ
bool "OMAP ARM 195 MHz CPU"
depends on ARCH_OMAP730
help
Enable 195MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_192MHZ
bool "OMAP ARM 192 MHz CPU"
depends on ARCH_OMAP16XX
help
Enable 192MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_182MHZ
bool "OMAP ARM 182 MHz CPU"
depends on ARCH_OMAP730
help
Enable 182MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_168MHZ
bool "OMAP ARM 168 MHz CPU"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
help
Enable 168MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_120MHZ
bool "OMAP ARM 120 MHz CPU"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
help
Enable 120MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_60MHZ
bool "OMAP ARM 60 MHz CPU"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
default y
help
Enable 60MHz clock for OMAP CPU. If unsure, say Y.
config OMAP_ARM_30MHZ
bool "OMAP ARM 30 MHz CPU"
depends on ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730
help
Enable 30MHz clock for OMAP CPU. If unsure, say N.
endmenu
endif

40
arch/arm/mach-omap/Makefile
View File

@ -1,40 +0,0 @@
#
# Makefile for the linux kernel.
#
# Common support
obj-y := common.o time.o irq.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o
obj-m :=
obj-n :=
obj- :=
led-y := leds.o
# Specific board support
obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o
# OCPI interconnect support for 1710, 1610 and 5912
obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
# LEDs support
led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o
led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o
led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o
obj-$(CONFIG_LEDS) += $(led-y)
# Power Management
obj-$(CONFIG_PM) += pm.o sleep.o
ifeq ($(CONFIG_ARCH_OMAP1510),y)
# Innovator-1510 FPGA
obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o
endif
# kgdb support
obj-$(CONFIG_KGDB_SERIAL) += kgdb-serial.o

549
arch/arm/mach-omap/common.c
View File

@ -1,549 +0,0 @@
/*
* linux/arch/arm/mach-omap/common.c
*
* Code common to all OMAP machines.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/hardware/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/board.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include "clock.h"
#define DEBUG 1
struct omap_id {
u16 jtag_id; /* Used to determine OMAP type */
u8 die_rev; /* Processor revision */
u32 omap_id; /* OMAP revision */
u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
};
/* Register values to detect the OMAP version */
static struct omap_id omap_ids[] __initdata = {
{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
{ .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
{ .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
{ .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
{ .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
{ .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
{ .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
{ .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
{ .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
};
/*
* Get OMAP type from PROD_ID.
* 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
* 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
* Undocumented register in TEST BLOCK is used as fallback; This seems to
* work on 1510, 1610 & 1710. The official way hopefully will work in future
* processors.
*/
static u16 __init omap_get_jtag_id(void)
{
u32 prod_id, omap_id;
prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
omap_id = omap_readl(OMAP32_ID_1);
/* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
if (((prod_id >> 20) == 0) || (prod_id == omap_id))
prod_id = 0;
else
prod_id &= 0xffff;
if (prod_id)
return prod_id;
/* Use OMAP32_ID_1 as fallback */
prod_id = ((omap_id >> 12) & 0xffff);
return prod_id;
}
/*
* Get OMAP revision from DIE_REV.
* Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
* Undocumented register in the TEST BLOCK is used as fallback.
* REVISIT: This does not seem to work on 1510
*/
static u8 __init omap_get_die_rev(void)
{
u32 die_rev;
die_rev = omap_readl(OMAP_DIE_ID_1);
/* Check for broken OMAP_DIE_ID on early 1710 */
if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
die_rev = 0;
die_rev = (die_rev >> 17) & 0xf;
if (die_rev)
return die_rev;
die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
return die_rev;
}
static void __init omap_check_revision(void)
{
int i;
u16 jtag_id;
u8 die_rev;
u32 omap_id;
u8 cpu_type;
jtag_id = omap_get_jtag_id();
die_rev = omap_get_die_rev();
omap_id = omap_readl(OMAP32_ID_0);
#ifdef DEBUG
printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
omap_readl(OMAP_DIE_ID_1),
(omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
omap_readl(OMAP_PRODUCTION_ID_1),
omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
#endif
system_serial_high = omap_readl(OMAP_DIE_ID_0);
system_serial_low = omap_readl(OMAP_DIE_ID_1);
/* First check only the major version in a safe way */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == (omap_ids[i].jtag_id)) {
system_rev = omap_ids[i].type;
break;
}
}
/* Check if we can find the die revision */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
system_rev = omap_ids[i].type;
break;
}
}
/* Finally check also the omap_id */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == omap_ids[i].jtag_id
&& die_rev == omap_ids[i].die_rev
&& omap_id == omap_ids[i].omap_id) {
system_rev = omap_ids[i].type;
break;
}
}
/* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
cpu_type = system_rev >> 24;
switch (cpu_type) {
case 0x07:
system_rev |= 0x07;
break;
case 0x15:
system_rev |= 0x15;
break;
case 0x16:
case 0x17:
system_rev |= 0x16;
break;
case 0x24:
system_rev |= 0x24;
break;
default:
printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
}
printk("OMAP%04x", system_rev >> 16);
if ((system_rev >> 8) & 0xff)
printk("%x", (system_rev >> 8) & 0xff);
printk(" revision %i handled as %02xxx id: %08x%08x\n",
die_rev, system_rev & 0xff, system_serial_low,
system_serial_high);
}
/*
* ----------------------------------------------------------------------------
* OMAP I/O mapping
*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
* ----------------------------------------------------------------------------
*/
static struct map_desc omap_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
};
#ifdef CONFIG_ARCH_OMAP730
static struct map_desc omap730_io_desc[] __initdata = {
{ OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
{ OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
{ OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE }
};
#endif
#ifdef CONFIG_ARCH_OMAP1510
static struct map_desc omap1510_io_desc[] __initdata = {
{ OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
{ OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
{ OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE }
};
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
static struct map_desc omap1610_io_desc[] __initdata = {
{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE }
};
static struct map_desc omap5912_io_desc[] __initdata = {
{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
/*
* The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
* size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
* Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
* can be used.
*/
{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE }
};
#endif
static int initialized = 0;
static void __init _omap_map_io(void)
{
initialized = 1;
/* We have to initialize the IO space mapping before we can run
* cpu_is_omapxxx() macros. */
iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
omap_check_revision();
#ifdef CONFIG_ARCH_OMAP730
if (cpu_is_omap730()) {
iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
}
#endif
#ifdef CONFIG_ARCH_OMAP1510
if (cpu_is_omap1510()) {
iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
}
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
if (cpu_is_omap1610() || cpu_is_omap1710()) {
iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
}
if (cpu_is_omap5912()) {
iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
}
#endif
/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
* on a Posted Write in the TIPB Bridge".
*/
omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
/* Must init clocks early to assure that timer interrupt works
*/
clk_init();
}
/*
* This should only get called from board specific init
*/
void omap_map_io(void)
{
if (!initialized)
_omap_map_io();
}
static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
int offset)
{
offset <<= up->regshift;
return (unsigned int)__raw_readb(up->membase + offset);
}
static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
int value)
{
offset <<= p->regshift;
__raw_writeb(value, p->membase + offset);
}
/*
* Internal UARTs need to be initialized for the 8250 autoconfig to work
* properly. Note that the TX watermark initialization may not be needed
* once the 8250.c watermark handling code is merged.
*/
static void __init omap_serial_reset(struct plat_serial8250_port *p)
{
omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
if (!cpu_is_omap1510()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
}
}
static struct plat_serial8250_port serial_platform_data[] = {
{
.membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
.mapbase = (unsigned long)OMAP_UART1_BASE,
.irq = INT_UART1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
.membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
.mapbase = (unsigned long)OMAP_UART2_BASE,
.irq = INT_UART2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
.membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
.mapbase = (unsigned long)OMAP_UART3_BASE,
.irq = INT_UART3,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = serial_platform_data,
},
};
/*
* Note that on Innovator-1510 UART2 pins conflict with USB2.
* By default UART2 does not work on Innovator-1510 if you have
* USB OHCI enabled. To use UART2, you must disable USB2 first.
*/
void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
{
int i;
if (cpu_is_omap730()) {
serial_platform_data[0].regshift = 0;
serial_platform_data[1].regshift = 0;
serial_platform_data[0].irq = INT_730_UART_MODEM_1;
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
if (cpu_is_omap1510()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
}
for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
unsigned char reg;
if (ports[i] == 0) {
serial_platform_data[i].membase = 0;
serial_platform_data[i].mapbase = 0;
continue;
}
switch (i) {
case 0:
if (cpu_is_omap1510()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM1_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 1:
if (cpu_is_omap1510()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM2_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 2:
if (cpu_is_omap1510()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
if (cpu_is_omap1710()) {
clk_enable(clk_get(0, "uart3_ck"));
}
break;
}
omap_serial_reset(&serial_platform_data[i]);
}
}
static int __init omap_init(void)
{
return platform_device_register(&serial_device);
}
arch_initcall(omap_init);
#define NO_LENGTH_CHECK 0xffffffff
extern int omap_bootloader_tag_len;
extern u8 omap_bootloader_tag[];
struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size = 0;
static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
struct omap_board_config_kernel *kinfo = NULL;
int i;
#ifdef CONFIG_OMAP_BOOT_TAG
struct omap_board_config_entry *info = NULL;
if (omap_bootloader_tag_len > 4)
info = (struct omap_board_config_entry *) omap_bootloader_tag;
while (info != NULL) {
u8 *next;
if (info->tag == tag) {
if (skip == 0)
break;
skip--;
}
if ((info->len & 0x03) != 0) {
/* We bail out to avoid an alignment fault */
printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
info->len, info->tag);
return NULL;
}
next = (u8 *) info + sizeof(*info) + info->len;
if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
info = NULL;
else
info = (struct omap_board_config_entry *) next;
}
if (info != NULL) {
/* Check the length as a lame attempt to check for
* binary inconsistancy. */
if (len != NO_LENGTH_CHECK) {
/* Word-align len */
if (len & 0x03)
len = (len + 3) & ~0x03;
if (info->len != len) {
printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
tag, len, info->len);
return NULL;
}
}
if (len_out != NULL)
*len_out = info->len;
return info->data;
}
#endif
/* Try to find the config from the board-specific structures
* in the kernel. */
for (i = 0; i < omap_board_config_size; i++) {
if (omap_board_config[i].tag == tag) {
kinfo = &omap_board_config[i];
break;
}
}
if (kinfo == NULL)
return NULL;
return kinfo->data;
}
const void *__omap_get_config(u16 tag, size_t len, int nr)
{
return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);
const void *omap_get_var_config(u16 tag, size_t *len)
{
return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);
static int __init omap_add_serial_console(void)
{
const struct omap_uart_config *info;
info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
if (info != NULL && info->console_uart) {
static char speed[11], *opt = NULL;
if (info->console_speed) {
snprintf(speed, sizeof(speed), "%u", info->console_speed);
opt = speed;
}
return add_preferred_console("ttyS", info->console_uart - 1, opt);
}
return 0;
}
console_initcall(omap_add_serial_console);

144
arch/arm/mach-omap1/Kconfig Normal file
View File

@ -0,0 +1,144 @@
comment "OMAP Core Type"
depends on ARCH_OMAP1
config ARCH_OMAP730
depends on ARCH_OMAP1
bool "OMAP730 Based System"
select ARCH_OMAP_OTG
config ARCH_OMAP1510
depends on ARCH_OMAP1
default y
bool "OMAP1510 Based System"
config ARCH_OMAP16XX
depends on ARCH_OMAP1
bool "OMAP16xx Based System"
select ARCH_OMAP_OTG
comment "OMAP Board Type"
depends on ARCH_OMAP1
config MACH_OMAP_INNOVATOR
bool "TI Innovator"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
help
TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
have such a board.
config MACH_OMAP_H2
bool "TI H2 Support"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
TI OMAP 1610/1611B H2 board support. Say Y here if you have such
a board.
config MACH_OMAP_H3
bool "TI H3 Support"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
TI OMAP 1710 H3 board support. Say Y here if you have such
a board.
config MACH_OMAP_OSK
bool "TI OSK Support"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here
if you have such a board.
config MACH_OMAP_PERSEUS2
bool "TI Perseus2"
depends on ARCH_OMAP1 && ARCH_OMAP730
help
Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
a board.
config MACH_VOICEBLUE
bool "Voiceblue"
depends on ARCH_OMAP1 && ARCH_OMAP1510
help
Support for Voiceblue GSM/VoIP gateway. Say Y here if you have
such a board.
config MACH_NETSTAR
bool "NetStar"
depends on ARCH_OMAP1 && ARCH_OMAP1510
help
Support for NetStar PBX. Say Y here if you have such a board.
config MACH_OMAP_GENERIC
bool "Generic OMAP board"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
help
Support for generic OMAP-1510, 1610 or 1710 board with
no FPGA. Can be used as template for porting Linux to
custom OMAP boards. Say Y here if you have a custom
board.
comment "OMAP CPU Speed"
depends on ARCH_OMAP1
config OMAP_CLOCKS_SET_BY_BOOTLOADER
bool "OMAP clocks set by bootloader"
depends on ARCH_OMAP1
help
Enable this option to prevent the kernel from overriding the clock
frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
internal LCD controller and MPU peripherals.
config OMAP_ARM_216MHZ
bool "OMAP ARM 216 MHz CPU (1710 only)"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N.
config OMAP_ARM_195MHZ
bool "OMAP ARM 195 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP730
help
Enable 195MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_192MHZ
bool "OMAP ARM 192 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP16XX
help
Enable 192MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_182MHZ
bool "OMAP ARM 182 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP730
help
Enable 182MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_168MHZ
bool "OMAP ARM 168 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
help
Enable 168MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_150MHZ
bool "OMAP ARM 150 MHz CPU"
depends on ARCH_OMAP1 && ARCH_OMAP1510
help
Enable 150MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_120MHZ
bool "OMAP ARM 120 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
help
Enable 120MHz clock for OMAP CPU. If unsure, say N.
config OMAP_ARM_60MHZ
bool "OMAP ARM 60 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
default y
help
Enable 60MHz clock for OMAP CPU. If unsure, say Y.
config OMAP_ARM_30MHZ
bool "OMAP ARM 30 MHz CPU"
depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
help
Enable 30MHz clock for OMAP CPU. If unsure, say N.

30
arch/arm/mach-omap1/Makefile Normal file
View File

@ -0,0 +1,30 @@
#
# Makefile for the linux kernel.
#
# Common support
obj-y := io.o id.o irq.o time.o serial.o
led-y := leds.o
# Specific board support
obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
obj-$(CONFIG_MACH_NETSTAR) += board-netstar.o
ifeq ($(CONFIG_ARCH_OMAP1510),y)
# Innovator-1510 FPGA
obj-$(CONFIG_MACH_OMAP_INNOVATOR) += fpga.o
endif
# LEDs support
led-$(CONFIG_MACH_OMAP_H2) += leds-h2p2-debug.o
led-$(CONFIG_MACH_OMAP_INNOVATOR) += leds-innovator.o
led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-h2p2-debug.o
led-$(CONFIG_MACH_OMAP_OSK) += leds-osk.o
obj-$(CONFIG_LEDS) += $(led-y)

1
arch/arm/mach-omap/Makefile.boot → arch/arm/mach-omap1/Makefile.boot
View File

@ -1,4 +1,3 @@
zreladdr-y := 0x10008000
params_phys-y := 0x10000100
initrd_phys-y := 0x10800000

7
arch/arm/mach-omap/board-generic.c → arch/arm/mach-omap1/board-generic.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-generic.c
* linux/arch/arm/mach-omap1/board-generic.c
*
* Modified from board-innovator1510.c
*
@ -26,8 +26,7 @@
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include <asm/arch/board.h>
#include "common.h"
#include <asm/arch/common.h>
static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
@ -84,7 +83,7 @@ static void __init omap_generic_init(void)
static void __init omap_generic_map_io(void)
{
omap_map_io();
omap_map_common_io()
}
MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")

7
arch/arm/mach-omap/board-h2.c → arch/arm/mach-omap1/board-h2.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-h2.c
* linux/arch/arm/mach-omap1/board-h2.c
*
* Board specific inits for OMAP-1610 H2
*
@ -35,8 +35,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/tc.h>
#include <asm/arch/usb.h>
#include "common.h"
#include <asm/arch/common.h>
extern int omap_gpio_init(void);
@ -172,7 +171,7 @@ static void __init h2_init(void)
static void __init h2_map_io(void)
{
omap_map_io();
omap_map_common_io();
omap_serial_init(h2_serial_ports);
}

7
arch/arm/mach-omap/board-h3.c → arch/arm/mach-omap1/board-h3.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-h3.c
* linux/arch/arm/mach-omap1/board-h3.c
*
* This file contains OMAP1710 H3 specific code.
*
@ -37,8 +37,7 @@
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include <asm/arch/usb.h>
#include "common.h"
#include <asm/arch/common.h>
extern int omap_gpio_init(void);
@ -190,7 +189,7 @@ void h3_init_irq(void)
static void __init h3_map_io(void)
{
omap_map_io();
omap_map_common_io();
omap_serial_init(h3_serial_ports);
}

7
arch/arm/mach-omap/board-innovator.c → arch/arm/mach-omap1/board-innovator.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-innovator.c
* linux/arch/arm/mach-omap1/board-innovator.c
*
* Board specific inits for OMAP-1510 and OMAP-1610 Innovator
*
@ -33,8 +33,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/tc.h>
#include <asm/arch/usb.h>
#include "common.h"
#include <asm/arch/common.h>
static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
@ -252,7 +251,7 @@ static void __init innovator_init(void)
static void __init innovator_map_io(void)
{
omap_map_io();
omap_map_common_io();
#ifdef CONFIG_ARCH_OMAP1510
if (cpu_is_omap1510()) {

5
arch/arm/mach-omap/board-netstar.c → arch/arm/mach-omap1/board-netstar.c
View File

@ -26,8 +26,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include "common.h"
#include <asm/arch/common.h>
extern void __init omap_init_time(void);
extern int omap_gpio_init(void);
@ -100,7 +99,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
static void __init netstar_map_io(void)
{
omap_map_io();
omap_map_common_io();
omap_serial_init(omap_serial_ports);
}

7
arch/arm/mach-omap/board-osk.c → arch/arm/mach-omap1/board-osk.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-osk.c
* linux/arch/arm/mach-omap1/board-osk.c
*
* Board specific init for OMAP5912 OSK
*
@ -39,8 +39,7 @@
#include <asm/arch/usb.h>
#include <asm/arch/mux.h>
#include <asm/arch/tc.h>
#include "common.h"
#include <asm/arch/common.h>
static struct map_desc osk5912_io_desc[] __initdata = {
{ OMAP_OSK_NOR_FLASH_BASE, OMAP_OSK_NOR_FLASH_START, OMAP_OSK_NOR_FLASH_SIZE,
@ -153,7 +152,7 @@ static void __init osk_init(void)
static void __init osk_map_io(void)
{
omap_map_io();
omap_map_common_io();
iotable_init(osk5912_io_desc, ARRAY_SIZE(osk5912_io_desc));
omap_serial_init(osk_serial_ports);
}

7
arch/arm/mach-omap/board-perseus2.c → arch/arm/mach-omap1/board-perseus2.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-perseus2.c
* linux/arch/arm/mach-omap1/board-perseus2.c
*
* Modified from board-generic.c
*
@ -27,8 +27,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include "common.h"
#include <asm/arch/common.h>
static struct resource smc91x_resources[] = {
[0] = {
@ -140,7 +139,7 @@ static struct map_desc omap_perseus2_io_desc[] __initdata = {
static void __init omap_perseus2_map_io(void)
{
omap_map_io();
omap_map_common_io();
iotable_init(omap_perseus2_io_desc,
ARRAY_SIZE(omap_perseus2_io_desc));

7
arch/arm/mach-omap/board-voiceblue.c → arch/arm/mach-omap1/board-voiceblue.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/board-voiceblue.c
* linux/arch/arm/mach-omap1/board-voiceblue.c
*
* Modified from board-generic.c
*
@ -31,8 +31,7 @@
#include <asm/arch/tc.h>
#include <asm/arch/mux.h>
#include <asm/arch/usb.h>
#include "common.h"
#include <asm/arch/common.h>
extern void omap_init_time(void);
extern int omap_gpio_init(void);
@ -170,7 +169,7 @@ static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
static void __init voiceblue_map_io(void)
{
omap_map_io();
omap_map_common_io();
omap_serial_init(omap_serial_ports);
}

0
arch/arm/mach-omap/fpga.c → arch/arm/mach-omap1/fpga.c
View File

188
arch/arm/mach-omap1/id.c Normal file
View File

@ -0,0 +1,188 @@
/*
* linux/arch/arm/mach-omap1/id.c
*
* OMAP1 CPU identification code
*
* Copyright (C) 2004 Nokia Corporation
* Written by Tony Lindgren <tony@atomide.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
struct omap_id {
u16 jtag_id; /* Used to determine OMAP type */
u8 die_rev; /* Processor revision */
u32 omap_id; /* OMAP revision */
u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
};
/* Register values to detect the OMAP version */
static struct omap_id omap_ids[] __initdata = {
{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
{ .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
{ .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
{ .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
{ .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
{ .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
{ .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
{ .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
{ .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
};
/*
* Get OMAP type from PROD_ID.
* 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
* 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
* Undocumented register in TEST BLOCK is used as fallback; This seems to
* work on 1510, 1610 & 1710. The official way hopefully will work in future
* processors.
*/
static u16 __init omap_get_jtag_id(void)
{
u32 prod_id, omap_id;
prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
omap_id = omap_readl(OMAP32_ID_1);
/* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
if (((prod_id >> 20) == 0) || (prod_id == omap_id))
prod_id = 0;
else
prod_id &= 0xffff;
if (prod_id)
return prod_id;
/* Use OMAP32_ID_1 as fallback */
prod_id = ((omap_id >> 12) & 0xffff);
return prod_id;
}
/*
* Get OMAP revision from DIE_REV.
* Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
* Undocumented register in the TEST BLOCK is used as fallback.
* REVISIT: This does not seem to work on 1510
*/
static u8 __init omap_get_die_rev(void)
{
u32 die_rev;
die_rev = omap_readl(OMAP_DIE_ID_1);
/* Check for broken OMAP_DIE_ID on early 1710 */
if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
die_rev = 0;
die_rev = (die_rev >> 17) & 0xf;
if (die_rev)
return die_rev;
die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
return die_rev;
}
void __init omap_check_revision(void)
{
int i;
u16 jtag_id;
u8 die_rev;
u32 omap_id;
u8 cpu_type;
jtag_id = omap_get_jtag_id();
die_rev = omap_get_die_rev();
omap_id = omap_readl(OMAP32_ID_0);
#ifdef DEBUG
printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
omap_readl(OMAP_DIE_ID_1),
(omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
omap_readl(OMAP_PRODUCTION_ID_1),
omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
#endif
system_serial_high = omap_readl(OMAP_DIE_ID_0);
system_serial_low = omap_readl(OMAP_DIE_ID_1);
/* First check only the major version in a safe way */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == (omap_ids[i].jtag_id)) {
system_rev = omap_ids[i].type;
break;
}
}
/* Check if we can find the die revision */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
system_rev = omap_ids[i].type;
break;
}
}
/* Finally check also the omap_id */
for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
if (jtag_id == omap_ids[i].jtag_id
&& die_rev == omap_ids[i].die_rev
&& omap_id == omap_ids[i].omap_id) {
system_rev = omap_ids[i].type;
break;
}
}
/* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
cpu_type = system_rev >> 24;
switch (cpu_type) {
case 0x07:
system_rev |= 0x07;
break;
case 0x15:
system_rev |= 0x15;
break;
case 0x16:
case 0x17:
system_rev |= 0x16;
break;
case 0x24:
system_rev |= 0x24;
break;
default:
printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
}
printk("OMAP%04x", system_rev >> 16);
if ((system_rev >> 8) & 0xff)
printk("%x", (system_rev >> 8) & 0xff);
printk(" revision %i handled as %02xxx id: %08x%08x\n",
die_rev, system_rev & 0xff, system_serial_low,
system_serial_high);
}

115
arch/arm/mach-omap1/io.c Normal file
View File

@ -0,0 +1,115 @@
/*
* linux/arch/arm/mach-omap1/io.c
*
* OMAP1 I/O mapping code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/mach/map.h>
#include <asm/io.h>
#include <asm/arch/tc.h>
extern int clk_init(void);
extern void omap_check_revision(void);
/*
* The machine specific code may provide the extra mapping besides the
* default mapping provided here.
*/
static struct map_desc omap_io_desc[] __initdata = {
{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
};
#ifdef CONFIG_ARCH_OMAP730
static struct map_desc omap730_io_desc[] __initdata = {
{ OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
{ OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
{ OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE }
};
#endif
#ifdef CONFIG_ARCH_OMAP1510
static struct map_desc omap1510_io_desc[] __initdata = {
{ OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
{ OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
{ OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE }
};
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
static struct map_desc omap1610_io_desc[] __initdata = {
{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE }
};
static struct map_desc omap5912_io_desc[] __initdata = {
{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
/*
* The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
* size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
* Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
* can be used.
*/
{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE }
};
#endif
static int initialized = 0;
static void __init _omap_map_io(void)
{
initialized = 1;
/* We have to initialize the IO space mapping before we can run
* cpu_is_omapxxx() macros. */
iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
omap_check_revision();
#ifdef CONFIG_ARCH_OMAP730
if (cpu_is_omap730()) {
iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
}
#endif
#ifdef CONFIG_ARCH_OMAP1510
if (cpu_is_omap1510()) {
iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
}
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
if (cpu_is_omap1610() || cpu_is_omap1710()) {
iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
}
if (cpu_is_omap5912()) {
iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
}
#endif
/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
* on a Posted Write in the TIPB Bridge".
*/
omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
/* Must init clocks early to assure that timer interrupt works
*/
clk_init();
}
/*
* This should only get called from board specific init
*/
void omap_map_common_io(void)
{
if (!initialized)
_omap_map_io();
}

17
arch/arm/mach-omap/irq.c → arch/arm/mach-omap1/irq.c
View File

@ -56,6 +56,7 @@
struct omap_irq_bank {
unsigned long base_reg;
unsigned long trigger_map;
unsigned long wake_enable;
};
static unsigned int irq_bank_count = 0;
@ -105,6 +106,19 @@ static void omap_mask_ack_irq(unsigned int irq)
omap_ack_irq(irq);
}
static int omap_wake_irq(unsigned int irq, unsigned int enable)
{
int bank = IRQ_BANK(irq);
if (enable)
irq_banks[bank].wake_enable |= IRQ_BIT(irq);
else
irq_banks[bank].wake_enable &= ~IRQ_BIT(irq);
return 0;
}
/*
* Allows tuning the IRQ type and priority
*
@ -145,7 +159,7 @@ static struct omap_irq_bank omap1510_irq_banks[] = {
static struct omap_irq_bank omap1610_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xfffff7ff },
{ .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff },
{ .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },
};
#endif
@ -154,6 +168,7 @@ static struct irqchip omap_irq_chip = {
.ack = omap_mask_ack_irq,
.mask = omap_mask_irq,
.unmask = omap_unmask_irq,
.wake = omap_wake_irq,
};
void __init omap_init_irq(void)

0
arch/arm/mach-omap/leds-h2p2-debug.c → arch/arm/mach-omap1/leds-h2p2-debug.c
View File

0
arch/arm/mach-omap/leds-innovator.c → arch/arm/mach-omap1/leds-innovator.c
View File

4
arch/arm/mach-omap/leds-osk.c → arch/arm/mach-omap1/leds-osk.c
View File

@ -129,14 +129,11 @@ void osk_leds_event(led_event_t evt)
#ifdef CONFIG_FB_OMAP
#ifdef CONFIG_LEDS_TIMER
case led_timer:
hw_led_state ^= TIMER_LED;
mistral_setled();
break;
#endif
#ifdef CONFIG_LEDS_CPU
case led_idle_start:
hw_led_state |= IDLE_LED;
mistral_setled();
@ -146,7 +143,6 @@ void osk_leds_event(led_event_t evt)
hw_led_state &= ~IDLE_LED;
mistral_setled();
break;
#endif
#endif /* CONFIG_FB_OMAP */

0
arch/arm/mach-omap/leds.c → arch/arm/mach-omap1/leds.c
View File

0
arch/arm/mach-omap/leds.h → arch/arm/mach-omap1/leds.h
View File

200
arch/arm/mach-omap1/serial.c Normal file
View File

@ -0,0 +1,200 @@
/*
* linux/arch/arm/mach-omap1/id.c
*
* OMAP1 CPU identification code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/hardware/clock.h>
#include <asm/arch/board.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
static struct clk * uart1_ck = NULL;
static struct clk * uart2_ck = NULL;
static struct clk * uart3_ck = NULL;
static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
int offset)
{
offset <<= up->regshift;
return (unsigned int)__raw_readb(up->membase + offset);
}
static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
int value)
{
offset <<= p->regshift;
__raw_writeb(value, p->membase + offset);
}
/*
* Internal UARTs need to be initialized for the 8250 autoconfig to work
* properly. Note that the TX watermark initialization may not be needed
* once the 8250.c watermark handling code is merged.
*/
static void __init omap_serial_reset(struct plat_serial8250_port *p)
{
omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
if (!cpu_is_omap1510()) {
omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
}
}
static struct plat_serial8250_port serial_platform_data[] = {
{
.membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
.mapbase = (unsigned long)OMAP_UART1_BASE,
.irq = INT_UART1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
.membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
.mapbase = (unsigned long)OMAP_UART2_BASE,
.irq = INT_UART2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{
.membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
.mapbase = (unsigned long)OMAP_UART3_BASE,
.irq = INT_UART3,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = OMAP16XX_BASE_BAUD * 16,
},
{ },
};
static struct platform_device serial_device = {
.name = "serial8250",
.id = 0,
.dev = {
.platform_data = serial_platform_data,
},
};
/*
* Note that on Innovator-1510 UART2 pins conflict with USB2.
* By default UART2 does not work on Innovator-1510 if you have
* USB OHCI enabled. To use UART2, you must disable USB2 first.
*/
void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
{
int i;
if (cpu_is_omap730()) {
serial_platform_data[0].regshift = 0;
serial_platform_data[1].regshift = 0;
serial_platform_data[0].irq = INT_730_UART_MODEM_1;
serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
}
if (cpu_is_omap1510()) {
serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
}
for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
unsigned char reg;
if (ports[i] == 0) {
serial_platform_data[i].membase = NULL;
serial_platform_data[i].mapbase = 0;
continue;
}
switch (i) {
case 0:
uart1_ck = clk_get(NULL, "uart1_ck");
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
clk_use(uart1_ck);
if (cpu_is_omap1510())
clk_set_rate(uart1_ck, 12000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART1_TX);
omap_cfg_reg(UART1_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM1_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 1:
uart2_ck = clk_get(NULL, "uart2_ck");
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
clk_use(uart2_ck);
if (cpu_is_omap1510())
clk_set_rate(uart2_ck, 12000000);
else
clk_set_rate(uart2_ck, 48000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART2_TX);
omap_cfg_reg(UART2_RTS);
if (machine_is_omap_innovator()) {
reg = fpga_read(OMAP1510_FPGA_POWER);
reg |= OMAP1510_FPGA_PCR_COM2_EN;
fpga_write(reg, OMAP1510_FPGA_POWER);
udelay(10);
}
}
break;
case 2:
uart3_ck = clk_get(NULL, "uart3_ck");
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
clk_use(uart3_ck);
if (cpu_is_omap1510())
clk_set_rate(uart3_ck, 12000000);
}
if (cpu_is_omap1510()) {
omap_cfg_reg(UART3_TX);
omap_cfg_reg(UART3_RX);
}
break;
}
omap_serial_reset(&serial_platform_data[i]);
}
}
static int __init omap_init(void)
{
return platform_device_register(&serial_device);
}
arch_initcall(omap_init);

32
arch/arm/mach-omap/time.c → arch/arm/mach-omap1/time.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/time.c
* linux/arch/arm/mach-omap1/time.c
*
* OMAP Timers
*
@ -58,17 +58,9 @@ struct sys_timer omap_timer;
* MPU timer
* ---------------------------------------------------------------------------
*/
#define OMAP_MPU_TIMER1_BASE (0xfffec500)
#define OMAP_MPU_TIMER2_BASE (0xfffec600)
#define OMAP_MPU_TIMER3_BASE (0xfffec700)
#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
#define OMAP_MPU_TIMER_OFFSET 0x100
#define MPU_TIMER_FREE (1 << 6)
#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
#define MPU_TIMER_AR (1 << 1)
#define MPU_TIMER_ST (1 << 0)
/* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
* converted to use kHz by Kevin Hilman */
/* convert from cycles(64bits) => nanoseconds (64bits)
@ -255,6 +247,13 @@ unsigned long long sched_clock(void)
#define OMAP_32K_TIMER_TCR 0x04
#define OMAP_32K_TICKS_PER_HZ (32768 / HZ)
#if (32768 % HZ) != 0
/* We cannot ignore modulo.
* Potential error can be as high as several percent.
*/
#define OMAP_32K_TICK_MODULO (32768 % HZ)
static unsigned modulo_count = 0; /* Counts 1/HZ units */
#endif
/*
* TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
@ -331,6 +330,19 @@ static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
now = omap_32k_sync_timer_read();
while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
#ifdef OMAP_32K_TICK_MODULO
/* Modulo addition may put omap_32k_last_tick ahead of now
* and cause unwanted repetition of the while loop.
*/
if (unlikely(now - omap_32k_last_tick == ~0))
break;
modulo_count += OMAP_32K_TICK_MODULO;
if (modulo_count > HZ) {
++omap_32k_last_tick;
modulo_count -= HZ;
}
#endif
omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
timer_tick(regs);
}
@ -407,7 +419,7 @@ static __init void omap_init_32k_timer(void)
* Timer initialization
* ---------------------------------------------------------------------------
*/
void __init omap_timer_init(void)
static void __init omap_timer_init(void)
{
#if defined(CONFIG_OMAP_MPU_TIMER)
omap_init_mpu_timer();

2
arch/arm/mm/Kconfig
View File

@ -101,7 +101,7 @@ config CPU_ARM922T
# ARM925T
config CPU_ARM925T
bool "Support ARM925T processor" if ARCH_OMAP
bool "Support ARM925T processor" if ARCH_OMAP1
depends on ARCH_OMAP1510
default y if ARCH_OMAP1510
select CPU_32v4

4
arch/arm/mm/mm-armv.c
View File

@ -399,7 +399,7 @@ static void __init build_mem_type_table(void)
ecc_mask = 0;
}
if (cpu_arch <= CPU_ARCH_ARMv5) {
if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
if (mem_types[i].prot_l1)
mem_types[i].prot_l1 |= PMD_BIT4;
@ -584,7 +584,7 @@ void setup_mm_for_reboot(char mode)
pmdval = (i << PGDIR_SHIFT) |
PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
PMD_TYPE_SECT;
if (cpu_arch <= CPU_ARCH_ARMv5)
if (cpu_arch <= CPU_ARCH_ARMv5TEJ)
pmdval |= PMD_BIT4;
pmd = pmd_off(pgd, i << PGDIR_SHIFT);
pmd[0] = __pmd(pmdval);

112
arch/arm/plat-omap/Kconfig Normal file
View File

@ -0,0 +1,112 @@
if ARCH_OMAP
menu "TI OMAP Implementations"
config ARCH_OMAP_OTG
bool
choice
prompt "OMAP System Type"
default ARCH_OMAP1
config ARCH_OMAP1
bool "TI OMAP1"
config ARCH_OMAP2
bool "TI OMAP2"
endchoice
comment "OMAP Feature Selections"
config OMAP_RESET_CLOCKS
bool "Reset unused clocks during boot"
depends on ARCH_OMAP
default n
help
Say Y if you want to reset unused clocks during boot.
This option saves power, but assumes all drivers are
using the clock framework. Broken drivers that do not
yet use clock framework may not work with this option.
If you are booting from another operating system, you
probably do not want this option enabled until your
device drivers work properly.
config OMAP_MUX
bool "OMAP multiplexing support"
depends on ARCH_OMAP
default y
help
Pin multiplexing support for OMAP boards. If your bootloader
sets the multiplexing correctly, say N. Otherwise, or if unsure,
say Y.
config OMAP_MUX_DEBUG
bool "Multiplexing debug output"
depends on OMAP_MUX
default n
help
Makes the multiplexing functions print out a lot of debug info.
This is useful if you want to find out the correct values of the
multiplexing registers.
config OMAP_MUX_WARNINGS
bool "Warn about pins the bootloader didn't set up"
depends on OMAP_MUX
default y
help
Choose Y here to warn whenever driver initialization logic needs
to change the pin multiplexing setup. When there are no warnings
printed, it's safe to deselect OMAP_MUX for your product.
choice
prompt "System timer"
default OMAP_MPU_TIMER
config OMAP_MPU_TIMER
bool "Use mpu timer"
help
Select this option if you want to use the OMAP mpu timer. This
timer provides more intra-tick resolution than the 32KHz timer,
but consumes more power.
config OMAP_32K_TIMER
bool "Use 32KHz timer"
depends on ARCH_OMAP16XX
help
Select this option if you want to enable the OMAP 32KHz timer.
This timer saves power compared to the OMAP_MPU_TIMER, and has
support for no tick during idle. The 32KHz timer provides less
intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
currently only available for OMAP-16xx.
endchoice
config OMAP_32K_TIMER_HZ
int "Kernel internal timer frequency for 32KHz timer"
range 32 1024
depends on OMAP_32K_TIMER
default "128"
help
Kernel internal timer frequency should be a divisor of 32768,
such as 64 or 128.
choice
prompt "Low-level debug console UART"
depends on ARCH_OMAP
default OMAP_LL_DEBUG_UART1
config OMAP_LL_DEBUG_UART1
bool "UART1"
config OMAP_LL_DEBUG_UART2
bool "UART2"
config OMAP_LL_DEBUG_UART3
bool "UART3"
endchoice
endmenu
endif

17
arch/arm/plat-omap/Makefile Normal file
View File

@ -0,0 +1,17 @@
#
# Makefile for the linux kernel.
#
# Common support
obj-y := common.o dma.o clock.o mux.o gpio.o mcbsp.o usb.o
obj-m :=
obj-n :=
obj- :=
# OCPI interconnect support for 1710, 1610 and 5912
obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
# Power Management
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_CPU_FREQ) += cpu-omap.o

371
arch/arm/mach-omap/clock.c → arch/arm/plat-omap/clock.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/clock.c
* linux/arch/arm/plat-omap/clock.c
*
* Copyright (C) 2004 Nokia corporation
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
@ -14,6 +14,7 @@
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/io.h>
#include <asm/semaphore.h>
#include <asm/hardware/clock.h>
#include <asm/arch/board.h>
@ -25,6 +26,8 @@ static LIST_HEAD(clocks);
static DECLARE_MUTEX(clocks_sem);
static DEFINE_SPINLOCK(clockfw_lock);
static void propagate_rate(struct clk * clk);
/* UART clock function */
static int set_uart_rate(struct clk * clk, unsigned long rate);
/* External clock (MCLK & BCLK) functions */
static int set_ext_clk_rate(struct clk * clk, unsigned long rate);
static long round_ext_clk_rate(struct clk * clk, unsigned long rate);
@ -34,7 +37,7 @@ static int select_table_rate(struct clk * clk, unsigned long rate);
static long round_to_table_rate(struct clk * clk, unsigned long rate);
void clk_setdpll(__u16, __u16);
struct mpu_rate rate_table[] = {
static struct mpu_rate rate_table[] = {
/* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
* armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
*/
@ -48,7 +51,7 @@ struct mpu_rate rate_table[] = {
{ 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
{ 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
{ 96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
{ 48000000, 12000000, 192000000, 0x0ccf, 0x2810 }, /* 4/4/4/4/8/8 */
{ 48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/8/4/4/8/8 */
{ 24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
#endif
#if defined(CONFIG_OMAP_ARM_182MHZ)
@ -58,7 +61,7 @@ struct mpu_rate rate_table[] = {
{ 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
#endif
#if defined(CONFIG_OMAP_ARM_150MHZ)
{ 150000000, 12000000, 150000000, 0x150a, 0x2cb0 }, /* 0/0/1/1/2/2 */
{ 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
#endif
#if defined(CONFIG_OMAP_ARM_120MHZ)
{ 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
@ -76,19 +79,11 @@ struct mpu_rate rate_table[] = {
};
static void ckctl_recalc(struct clk * clk)
{
int dsor;
/* Calculate divisor encoded as 2-bit exponent */
dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
if (unlikely(clk->flags & RATE_PROPAGATES))
propagate_rate(clk);
}
static void ckctl_recalc(struct clk * clk);
int __clk_enable(struct clk *clk);
void __clk_disable(struct clk *clk);
void __clk_unuse(struct clk *clk);
int __clk_use(struct clk *clk);
static void followparent_recalc(struct clk * clk)
@ -102,6 +97,14 @@ static void watchdog_recalc(struct clk * clk)
clk->rate = clk->parent->rate / 14;
}
static void uart_recalc(struct clk * clk)
{
unsigned int val = omap_readl(clk->enable_reg);
if (val & clk->enable_bit)
clk->rate = 48000000;
else
clk->rate = 12000000;
}
static struct clk ck_ref = {
.name = "ck_ref",
@ -138,7 +141,7 @@ static struct clk arm_ck = {
static struct clk armper_ck = {
.name = "armper_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
.flags = CLOCK_IN_OMAP730 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL,
.enable_reg = ARM_IDLECT2,
.enable_bit = EN_PERCK,
@ -185,7 +188,7 @@ static struct clk armwdt_ck = {
static struct clk arminth_ck16xx = {
.name = "arminth_ck",
.parent = &arm_ck,
.flags = CLOCK_IN_OMAP16XX,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
/* Note: On 16xx the frequency can be divided by 2 by programming
* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
@ -214,6 +217,38 @@ static struct clk dspmmu_ck = {
.recalc = &ckctl_recalc,
};
static struct clk dspper_ck = {
.name = "dspper_ck",
.parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL | DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET,
.recalc = &followparent_recalc,
//.recalc = &ckctl_recalc,
};
static struct clk dspxor_ck = {
.name = "dspxor_ck",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_XORPCK,
.recalc = &followparent_recalc,
};
static struct clk dsptim_ck = {
.name = "dsptim_ck",
.parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
DSP_DOMAIN_CLOCK | VIRTUAL_IO_ADDRESS,
.enable_reg = DSP_IDLECT2,
.enable_bit = EN_DSPTIMCK,
.recalc = &followparent_recalc,
};
static struct clk tc_ck = {
.name = "tc_ck",
.parent = &ck_dpll1,
@ -226,7 +261,7 @@ static struct clk tc_ck = {
static struct clk arminth_ck1510 = {
.name = "arminth_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP1510,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
/* Note: On 1510 the frequency follows TC_CK
*
@ -237,7 +272,7 @@ static struct clk arminth_ck1510 = {
static struct clk tipb_ck = {
.name = "tibp_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP1510,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
};
@ -271,14 +306,15 @@ static struct clk tc2_ck = {
static struct clk dma_ck = {
.name = "dma_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED,
.recalc = &followparent_recalc,
};
static struct clk dma_lcdfree_ck = {
.name = "dma_lcdfree_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP16XX,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
};
@ -303,14 +339,14 @@ static struct clk lb_ck = {
static struct clk rhea1_ck = {
.name = "rhea1_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP16XX,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
};
static struct clk rhea2_ck = {
.name = "rhea2_ck",
.parent = &tc_ck,
.flags = CLOCK_IN_OMAP16XX,
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
.recalc = &followparent_recalc,
};
@ -325,43 +361,55 @@ static struct clk lcd_ck = {
.recalc = &ckctl_recalc,
};
static struct clk uart1_ck = {
static struct clk uart1_1510 = {
.name = "uart1_ck",
/* Direct from ULPD, no parent */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
.enable_reg = MOD_CONF_CTRL_0,
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &set_uart_rate,
.recalc = &uart_recalc,
};
static struct clk uart1_16xx = {
.name = "uart1_ck",
/* Direct from ULPD, no parent */
.rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT,
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = MOD_CONF_CTRL_0,
.enable_bit = 29,
/* (Only on 1510)
* The "enable bit" actually chooses between 48MHz and 12MHz.
*/
};
static struct clk uart2_ck = {
.name = "uart2_ck",
/* Direct from ULPD, no parent */
.rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT,
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT,
.enable_reg = MOD_CONF_CTRL_0,
.enable_bit = 30,
/* (for both 1510 and 16xx)
* The "enable bit" actually chooses between 48MHz and 12MHz/32kHz.
*/
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &set_uart_rate,
.recalc = &uart_recalc,
};
static struct clk uart3_ck = {
static struct clk uart3_1510 = {
.name = "uart3_ck",
/* Direct from ULPD, no parent */
.rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | ALWAYS_ENABLED,
.enable_reg = MOD_CONF_CTRL_0,
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &set_uart_rate,
.recalc = &uart_recalc,
};
static struct clk uart3_16xx = {
.name = "uart3_ck",
/* Direct from ULPD, no parent */
.rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT,
.flags = CLOCK_IN_OMAP16XX | RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = MOD_CONF_CTRL_0,
.enable_bit = 31,
/* (Only on 1510)
* The "enable bit" actually chooses between 48MHz and 12MHz.
*/
};
static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
@ -480,6 +528,9 @@ static struct clk * onchip_clks[] = {
/* CK_GEN2 clocks */
&dsp_ck,
&dspmmu_ck,
&dspper_ck,
&dspxor_ck,
&dsptim_ck,
/* CK_GEN3 clocks */
&tc_ck,
&tipb_ck,
@ -494,9 +545,11 @@ static struct clk * onchip_clks[] = {
&rhea2_ck,
&lcd_ck,
/* ULPD clocks */
&uart1_ck,
&uart1_1510,
&uart1_16xx,
&uart2_ck,
&uart3_ck,
&uart3_1510,
&uart3_16xx,
&usb_clko,
&usb_hhc_ck1510, &usb_hhc_ck16xx,
&mclk_1510, &mclk_16xx,
@ -547,14 +600,34 @@ int __clk_enable(struct clk *clk)
return 0;
}
if (clk->flags & DSP_DOMAIN_CLOCK) {
__clk_use(&api_ck);
}
if (clk->flags & ENABLE_REG_32BIT) {
regval32 = omap_readl(clk->enable_reg);
regval32 |= (1 << clk->enable_bit);
omap_writel(regval32, clk->enable_reg);
if (clk->flags & VIRTUAL_IO_ADDRESS) {
regval32 = __raw_readl(clk->enable_reg);
regval32 |= (1 << clk->enable_bit);
__raw_writel(regval32, clk->enable_reg);
} else {
regval32 = omap_readl(clk->enable_reg);
regval32 |= (1 << clk->enable_bit);
omap_writel(regval32, clk->enable_reg);
}
} else {
regval16 = omap_readw(clk->enable_reg);
regval16 |= (1 << clk->enable_bit);
omap_writew(regval16, clk->enable_reg);
if (clk->flags & VIRTUAL_IO_ADDRESS) {
regval16 = __raw_readw(clk->enable_reg);
regval16 |= (1 << clk->enable_bit);
__raw_writew(regval16, clk->enable_reg);
} else {
regval16 = omap_readw(clk->enable_reg);
regval16 |= (1 << clk->enable_bit);
omap_writew(regval16, clk->enable_reg);
}
}
if (clk->flags & DSP_DOMAIN_CLOCK) {
__clk_unuse(&api_ck);
}
return 0;
@ -569,14 +642,34 @@ void __clk_disable(struct clk *clk)
if (clk->enable_reg == 0)
return;
if (clk->flags & DSP_DOMAIN_CLOCK) {
__clk_use(&api_ck);
}
if (clk->flags & ENABLE_REG_32BIT) {
regval32 = omap_readl(clk->enable_reg);
regval32 &= ~(1 << clk->enable_bit);
omap_writel(regval32, clk->enable_reg);
if (clk->flags & VIRTUAL_IO_ADDRESS) {
regval32 = __raw_readl(clk->enable_reg);
regval32 &= ~(1 << clk->enable_bit);
__raw_writel(regval32, clk->enable_reg);
} else {
regval32 = omap_readl(clk->enable_reg);
regval32 &= ~(1 << clk->enable_bit);
omap_writel(regval32, clk->enable_reg);
}
} else {
regval16 = omap_readw(clk->enable_reg);
regval16 &= ~(1 << clk->enable_bit);
omap_writew(regval16, clk->enable_reg);
if (clk->flags & VIRTUAL_IO_ADDRESS) {
regval16 = __raw_readw(clk->enable_reg);
regval16 &= ~(1 << clk->enable_bit);
__raw_writew(regval16, clk->enable_reg);
} else {
regval16 = omap_readw(clk->enable_reg);
regval16 &= ~(1 << clk->enable_bit);
omap_writew(regval16, clk->enable_reg);
}
}
if (clk->flags & DSP_DOMAIN_CLOCK) {
__clk_unuse(&api_ck);
}
}
@ -766,6 +859,33 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate)
return dsor_exp;
}
static void ckctl_recalc(struct clk * clk)
{
int dsor;
/* Calculate divisor encoded as 2-bit exponent */
if (clk->flags & DSP_DOMAIN_CLOCK) {
/* The clock control bits are in DSP domain,
* so api_ck is needed for access.
* Note that DSP_CKCTL virt addr = phys addr, so
* we must use __raw_readw() instead of omap_readw().
*/
__clk_use(&api_ck);
dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
__clk_unuse(&api_ck);
} else {
dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
}
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
if (unlikely(clk->flags & RATE_PROPAGATES))
propagate_rate(clk);
}
long clk_round_rate(struct clk *clk, unsigned long rate)
{
int dsor_exp;
@ -823,6 +943,9 @@ static int select_table_rate(struct clk * clk, unsigned long rate)
break;
}
if (!ptr->rate)
return -EINVAL;
if (!ptr->rate)
return -EINVAL;
@ -921,6 +1044,23 @@ static unsigned calc_ext_dsor(unsigned long rate)
return dsor;
}
/* Only needed on 1510 */
static int set_uart_rate(struct clk * clk, unsigned long rate)
{
unsigned int val;
val = omap_readl(clk->enable_reg);
if (rate == 12000000)
val &= ~(1 << clk->enable_bit);
else if (rate == 48000000)
val |= (1 << clk->enable_bit);
else
return -EINVAL;
omap_writel(val, clk->enable_reg);
clk->rate = rate;
return 0;
}
static int set_ext_clk_rate(struct clk * clk, unsigned long rate)
{
@ -985,7 +1125,18 @@ void clk_unregister(struct clk *clk)
}
EXPORT_SYMBOL(clk_unregister);
#ifdef CONFIG_OMAP_RESET_CLOCKS
/*
* Resets some clocks that may be left on from bootloader,
* but leaves serial clocks on. See also omap_late_clk_reset().
*/
static inline void omap_early_clk_reset(void)
{
//omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
}
#else
#define omap_early_clk_reset() {}
#endif
int __init clk_init(void)
{
@ -993,6 +1144,8 @@ int __init clk_init(void)
const struct omap_clock_config *info;
int crystal_type = 0; /* Default 12 MHz */
omap_early_clk_reset();
for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
clk_register(*clkp);
@ -1023,9 +1176,42 @@ int __init clk_init(void)
ck_ref.rate = 19200000;
#endif
printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
omap_readw(ARM_CKCTL));
/* We want to be in syncronous scalable mode */
omap_writew(0x1000, ARM_SYSST);
#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
/* Use values set by bootloader. Determine PLL rate and recalculate
* dependent clocks as if kernel had changed PLL or divisors.
*/
{
unsigned pll_ctl_val = omap_readw(DPLL_CTL);
ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
if (pll_ctl_val & 0x10) {
/* PLL enabled, apply multiplier and divisor */
if (pll_ctl_val & 0xf80)
ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
} else {
/* PLL disabled, apply bypass divisor */
switch (pll_ctl_val & 0xc) {
case 0:
break;
case 0x4:
ck_dpll1.rate /= 2;
break;
default:
ck_dpll1.rate /= 4;
break;
}
}
}
propagate_rate(&ck_dpll1);
#else
/* Find the highest supported frequency and enable it */
if (select_table_rate(&virtual_ck_mpu, ~0)) {
printk(KERN_ERR "System frequencies not set. Check your config.\n");
@ -1034,12 +1220,13 @@ int __init clk_init(void)
omap_writew(0x1005, ARM_CKCTL);
ck_dpll1.rate = 60000000;
propagate_rate(&ck_dpll1);
printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld/%ld/%ld\n",
ck_ref.rate, ck_dpll1.rate, arm_ck.rate);
}
#endif
/* Cache rates for clocks connected to ck_ref (not dpll1) */
propagate_rate(&ck_ref);
printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld/%ld MHz\n",
ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
ck_dpll1.rate, arm_ck.rate);
#ifdef CONFIG_MACH_OMAP_PERSEUS2
/* Select slicer output as OMAP input clock */
@ -1074,3 +1261,63 @@ int __init clk_init(void)
return 0;
}
#ifdef CONFIG_OMAP_RESET_CLOCKS
static int __init omap_late_clk_reset(void)
{
/* Turn off all unused clocks */
struct clk *p;
__u32 regval32;
omap_writew(0, SOFT_REQ_REG);
omap_writew(0, SOFT_REQ_REG2);
list_for_each_entry(p, &clocks, node) {
if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
p->enable_reg == 0)
continue;
/* Assume no DSP clocks have been activated by bootloader */
if (p->flags & DSP_DOMAIN_CLOCK)
continue;
/* Is the clock already disabled? */
if (p->flags & ENABLE_REG_32BIT) {
if (p->flags & VIRTUAL_IO_ADDRESS)
regval32 = __raw_readl(p->enable_reg);
else
regval32 = omap_readl(p->enable_reg);
} else {
if (p->flags & VIRTUAL_IO_ADDRESS)
regval32 = __raw_readw(p->enable_reg);
else
regval32 = omap_readw(p->enable_reg);
}
if ((regval32 & (1 << p->enable_bit)) == 0)
continue;
/* FIXME: This clock seems to be necessary but no-one
* has asked for its activation. */
if (p == &tc2_ck // FIX: pm.c (SRAM), CCP, Camera
|| p == &ck_dpll1out // FIX: SoSSI, SSR
|| p == &arm_gpio_ck // FIX: GPIO code for 1510
) {
printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
p->name);
continue;
}
printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
__clk_disable(p);
printk(" done\n");
}
return 0;
}
late_initcall(omap_late_clk_reset);
#endif

12
arch/arm/mach-omap/clock.h → arch/arm/plat-omap/clock.h
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/clock.h
* linux/arch/arm/plat-omap/clock.h
*
* Copyright (C) 2004 Nokia corporation
* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
@ -52,6 +52,8 @@ struct mpu_rate {
#define CLOCK_IN_OMAP16XX 64
#define CLOCK_IN_OMAP1510 128
#define CLOCK_IN_OMAP730 256
#define DSP_DOMAIN_CLOCK 512
#define VIRTUAL_IO_ADDRESS 1024
/* ARM_CKCTL bit shifts */
#define CKCTL_PERDIV_OFFSET 0
@ -63,6 +65,8 @@ struct mpu_rate {
/*#define ARM_TIMXO 12*/
#define EN_DSPCK 13
/*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */
/* DSP_CKCTL bit shifts */
#define CKCTL_DSPPERDIV_OFFSET 0
/* ARM_IDLECT1 bit shifts */
/*#define IDLWDT_ARM 0*/
@ -96,6 +100,9 @@ struct mpu_rate {
#define EN_TC1_CK 2
#define EN_TC2_CK 4
/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
#define EN_DSPTIMCK 5
/* Various register defines for clock controls scattered around OMAP chip */
#define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
#define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
@ -103,7 +110,8 @@ struct mpu_rate {
#define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
#define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
#define COM_CLK_DIV_CTRL_SEL 0xfffe0878
#define SOFT_REQ_REG 0xfffe0834
#define SOFT_REQ_REG2 0xfffe0880
int clk_register(struct clk *clk);
void clk_unregister(struct clk *clk);

135
arch/arm/plat-omap/common.c Normal file
View File

@ -0,0 +1,135 @@
/*
* linux/arch/arm/plat-omap/common.c
*
* Code common to all OMAP machines.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/hardware/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/board.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include "clock.h"
#define NO_LENGTH_CHECK 0xffffffff
extern int omap_bootloader_tag_len;
extern u8 omap_bootloader_tag[];
struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size = 0;
static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
struct omap_board_config_kernel *kinfo = NULL;
int i;
#ifdef CONFIG_OMAP_BOOT_TAG
struct omap_board_config_entry *info = NULL;
if (omap_bootloader_tag_len > 4)
info = (struct omap_board_config_entry *) omap_bootloader_tag;
while (info != NULL) {
u8 *next;
if (info->tag == tag) {
if (skip == 0)
break;
skip--;
}
if ((info->len & 0x03) != 0) {
/* We bail out to avoid an alignment fault */
printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
info->len, info->tag);
return NULL;
}
next = (u8 *) info + sizeof(*info) + info->len;
if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
info = NULL;
else
info = (struct omap_board_config_entry *) next;
}
if (info != NULL) {
/* Check the length as a lame attempt to check for
* binary inconsistancy. */
if (len != NO_LENGTH_CHECK) {
/* Word-align len */
if (len & 0x03)
len = (len + 3) & ~0x03;
if (info->len != len) {
printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
tag, len, info->len);
return NULL;
}
}
if (len_out != NULL)
*len_out = info->len;
return info->data;
}
#endif
/* Try to find the config from the board-specific structures
* in the kernel. */
for (i = 0; i < omap_board_config_size; i++) {
if (omap_board_config[i].tag == tag) {
kinfo = &omap_board_config[i];
break;
}
}
if (kinfo == NULL)
return NULL;
return kinfo->data;
}
const void *__omap_get_config(u16 tag, size_t len, int nr)
{
return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);
const void *omap_get_var_config(u16 tag, size_t *len)
{
return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);
static int __init omap_add_serial_console(void)
{
const struct omap_serial_console_config *info;
info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
struct omap_serial_console_config);
if (info != NULL && info->console_uart) {
static char speed[11], *opt = NULL;
if (info->console_speed) {
snprintf(speed, sizeof(speed), "%u", info->console_speed);
opt = speed;
}
return add_preferred_console("ttyS", info->console_uart - 1, opt);
}
return 0;
}
console_initcall(omap_add_serial_console);

128
arch/arm/plat-omap/cpu-omap.c Normal file
View File

@ -0,0 +1,128 @@
/*
* linux/arch/arm/plat-omap/cpu-omap.c
*
* CPU frequency scaling for OMAP
*
* Copyright (C) 2005 Nokia Corporation
* Written by Tony Lindgren <tony@atomide.com>
*
* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/err.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/hardware/clock.h>
/* TODO: Add support for SDRAM timing changes */
int omap_verify_speed(struct cpufreq_policy *policy)
{
struct clk * mpu_clk;
if (policy->cpu)
return -EINVAL;
cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
policy->cpuinfo.max_freq);
mpu_clk = clk_get(NULL, "mpu");
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
policy->cpuinfo.max_freq);
clk_put(mpu_clk);
return 0;
}
unsigned int omap_getspeed(unsigned int cpu)
{
struct clk * mpu_clk;
unsigned long rate;
if (cpu)
return 0;
mpu_clk = clk_get(NULL, "mpu");
if (IS_ERR(mpu_clk))
return 0;
rate = clk_get_rate(mpu_clk) / 1000;
clk_put(mpu_clk);
return rate;
}
static int omap_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
{
struct clk * mpu_clk;
struct cpufreq_freqs freqs;
int ret = 0;
mpu_clk = clk_get(NULL, "mpu");
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
freqs.old = omap_getspeed(0);
freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
freqs.cpu = 0;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
ret = clk_set_rate(mpu_clk, target_freq * 1000);
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
clk_put(mpu_clk);
return ret;
}
static int __init omap_cpu_init(struct cpufreq_policy *policy)
{
struct clk * mpu_clk;
mpu_clk = clk_get(NULL, "mpu");
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
if (policy->cpu != 0)
return -EINVAL;
policy->cur = policy->min = policy->max = omap_getspeed(0);
policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000;
policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
clk_put(mpu_clk);
return 0;
}
static struct cpufreq_driver omap_driver = {
.flags = CPUFREQ_STICKY,
.verify = omap_verify_speed,
.target = omap_target,
.get = omap_getspeed,
.init = omap_cpu_init,
.name = "omap",
};
static int __init omap_cpufreq_init(void)
{
return cpufreq_register_driver(&omap_driver);
}
arch_initcall(omap_cpufreq_init);

46
arch/arm/mach-omap/dma.c → arch/arm/plat-omap/dma.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/omap/dma.c
* linux/arch/arm/plat-omap/dma.c
*
* Copyright (C) 2003 Nokia Corporation
* Author: Juha Yrjölä <juha.yrjola@nokia.com>
@ -794,10 +794,6 @@ static void set_b1_regs(void)
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
/* Always set the source port as SDRAM for now*/
w &= ~(0x03 << 6);
if (lcd_dma.ext_ctrl)
w |= 1 << 8;
else
w &= ~(1 << 8);
if (lcd_dma.callback != NULL)
w |= 1 << 1; /* Block interrupt enable */
else
@ -889,9 +885,15 @@ void omap_enable_lcd_dma(void)
*/
if (enable_1510_mode || !lcd_dma.ext_ctrl)
return;
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
w |= 1 << 8;
omap_writew(w, OMAP1610_DMA_LCD_CTRL);
w = omap_readw(OMAP1610_DMA_LCD_CCR);
w |= 1 << 7;
omap_writew(w, OMAP1610_DMA_LCD_CCR);
lcd_dma.active = 1;
}
@ -922,10 +924,19 @@ void omap_setup_lcd_dma(void)
void omap_stop_lcd_dma(void)
{
u16 w;
lcd_dma.active = 0;
if (!enable_1510_mode && lcd_dma.ext_ctrl)
omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~(1 << 7),
OMAP1610_DMA_LCD_CCR);
if (enable_1510_mode || !lcd_dma.ext_ctrl)
return;
w = omap_readw(OMAP1610_DMA_LCD_CCR);
w &= ~(1 << 7);
omap_writew(w, OMAP1610_DMA_LCD_CCR);
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
w &= ~(1 << 8);
omap_writew(w, OMAP1610_DMA_LCD_CTRL);
}
/*
@ -972,6 +983,25 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
(OMAP_DMA_CDSA_U(lch) << 16));
}
int omap_dma_running(void)
{
int lch;
/* Check if LCD DMA is running */
if (cpu_is_omap16xx())
if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
return 1;
for (lch = 0; lch < dma_chan_count; lch++) {
u16 w;
w = omap_readw(OMAP_DMA_CCR(lch));
if (w & OMAP_DMA_CCR_EN)
return 1;
}
return 0;
}
static int __init omap_init_dma(void)
{
int ch, r;

2
arch/arm/mach-omap/gpio.c → arch/arm/plat-omap/gpio.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/gpio.c
* linux/arch/arm/plat-omap/gpio.c
*
* Support functions for OMAP GPIO
*

99
arch/arm/mach-omap/mcbsp.c → arch/arm/plat-omap/mcbsp.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/omap/mcbsp.c
* linux/arch/arm/plat-omap/mcbsp.c
*
* Copyright (C) 2004 Nokia Corporation
* Author: Samuel Ortiz <samuel.ortiz@nokia.com>
@ -66,6 +66,7 @@ struct omap_mcbsp {
static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
static struct clk *mcbsp_dsp_ck = 0;
static struct clk *mcbsp_api_ck = 0;
static struct clk *mcbsp_dspxor_ck = 0;
static void omap_mcbsp_dump_reg(u8 id)
@ -175,7 +176,7 @@ static int omap_mcbsp_check(unsigned int id)
return 0;
}
if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) {
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
if (id > OMAP_MAX_MCBSP_COUNT) {
printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
return -1;
@ -191,15 +192,12 @@ static int omap_mcbsp_check(unsigned int id)
static void omap_mcbsp_dsp_request(void)
{
if (cpu_is_omap1510() || cpu_is_omap1610() || cpu_is_omap1710()) {
omap_writew((omap_readw(ARM_RSTCT1) | (1 << 1) | (1 << 2)),
ARM_RSTCT1);
clk_enable(mcbsp_dsp_ck);
clk_enable(mcbsp_api_ck);
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
clk_use(mcbsp_dsp_ck);
clk_use(mcbsp_api_ck);
/* enable 12MHz clock to mcbsp 1 & 3 */
__raw_writew(__raw_readw(DSP_IDLECT2) | (1 << EN_XORPCK),
DSP_IDLECT2);
clk_use(mcbsp_dspxor_ck);
__raw_writew(__raw_readw(DSP_RSTCT2) | 1 | 1 << 1,
DSP_RSTCT2);
}
@ -207,10 +205,13 @@ static void omap_mcbsp_dsp_request(void)
static void omap_mcbsp_dsp_free(void)
{
/* Useless for now */
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
clk_unuse(mcbsp_dspxor_ck);
clk_unuse(mcbsp_dsp_ck);
clk_unuse(mcbsp_api_ck);
}
}
int omap_mcbsp_request(unsigned int id)
{
int err;
@ -350,6 +351,73 @@ void omap_mcbsp_stop(unsigned int id)
}
/* polled mcbsp i/o operations */
int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
{
u32 base = mcbsp[id].io_base;
writew(buf, base + OMAP_MCBSP_REG_DXR1);
/* if frame sync error - clear the error */
if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
/* clear error */
writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
base + OMAP_MCBSP_REG_SPCR2);
/* resend */
return -1;
} else {
/* wait for transmit confirmation */
int attemps = 0;
while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
if (attemps++ > 1000) {
writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
(~XRST),
base + OMAP_MCBSP_REG_SPCR2);
udelay(10);
writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
(XRST),
base + OMAP_MCBSP_REG_SPCR2);
udelay(10);
printk(KERN_ERR
" Could not write to McBSP Register\n");
return -2;
}
}
}
return 0;
}
int omap_mcbsp_pollread(unsigned int id, u16 * buf)
{
u32 base = mcbsp[id].io_base;
/* if frame sync error - clear the error */
if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
/* clear error */
writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
base + OMAP_MCBSP_REG_SPCR1);
/* resend */
return -1;
} else {
/* wait for recieve confirmation */
int attemps = 0;
while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
if (attemps++ > 1000) {
writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
(~RRST),
base + OMAP_MCBSP_REG_SPCR1);
udelay(10);
writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
(RRST),
base + OMAP_MCBSP_REG_SPCR1);
udelay(10);
printk(KERN_ERR
" Could not read from McBSP Register\n");
return -2;
}
}
}
*buf = readw(base + OMAP_MCBSP_REG_DRR1);
return 0;
}
/*
* IRQ based word transmission.
*/
@ -625,10 +693,15 @@ static int __init omap_mcbsp_init(void)
return PTR_ERR(mcbsp_dsp_ck);
}
mcbsp_api_ck = clk_get(0, "api_ck");
if (IS_ERR(mcbsp_dsp_ck)) {
if (IS_ERR(mcbsp_api_ck)) {
printk(KERN_ERR "mcbsp: could not acquire api_ck handle.\n");
return PTR_ERR(mcbsp_api_ck);
}
mcbsp_dspxor_ck = clk_get(0, "dspxor_ck");
if (IS_ERR(mcbsp_dspxor_ck)) {
printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n");
return PTR_ERR(mcbsp_dspxor_ck);
}
#ifdef CONFIG_ARCH_OMAP730
if (cpu_is_omap730()) {
@ -643,7 +716,7 @@ static int __init omap_mcbsp_init(void)
}
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
if (cpu_is_omap1610() || cpu_is_omap1710()) {
if (cpu_is_omap16xx()) {
mcbsp_info = mcbsp_1610;
mcbsp_count = ARRAY_SIZE(mcbsp_1610);
}

19
arch/arm/mach-omap/mux.c → arch/arm/plat-omap/mux.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/mux.c
* linux/arch/arm/plat-omap/mux.c
*
* Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
*
@ -53,19 +53,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
return -EINVAL;
}
cfg = &reg_cfg_table[reg_cfg];
/*
* We do a pretty long section here with lock on, but pin muxing
* should only happen on driver init for each driver, so it's not time
* critical.
*/
spin_lock_irqsave(&mux_spin_lock, flags);
cfg = (reg_cfg_set *)&reg_cfg_table[reg_cfg];
/* Check the mux register in question */
if (cfg->mux_reg) {
unsigned tmp1, tmp2;
spin_lock_irqsave(&mux_spin_lock, flags);
reg_orig = omap_readl(cfg->mux_reg);
/* The mux registers always seem to be 3 bits long */
@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
warn = 1;
omap_writel(reg, cfg->mux_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
}
/* Check for pull up or pull down selection on 1610 */
if (!cpu_is_omap1510()) {
if (cfg->pu_pd_reg && cfg->pull_val) {
spin_lock_irqsave(&mux_spin_lock, flags);
pu_pd_orig = omap_readl(cfg->pu_pd_reg);
mask = 1 << cfg->pull_bit;
@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
pu_pd = pu_pd_orig & ~mask;
}
omap_writel(pu_pd, cfg->pu_pd_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
}
}
/* Check for an associated pull down register */
if (cfg->pull_reg) {
spin_lock_irqsave(&mux_spin_lock, flags);
pull_orig = omap_readl(cfg->pull_reg);
mask = 1 << cfg->pull_bit;
@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
}
omap_writel(pull, cfg->pull_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
}
if (warn) {
@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
}
#endif
spin_unlock_irqrestore(&mux_spin_lock, flags);
#ifdef CONFIG_OMAP_MUX_ERRORS
return warn ? -ETXTBSY : 0;
#else

2
arch/arm/mach-omap/ocpi.c → arch/arm/plat-omap/ocpi.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/ocpi.c
* linux/arch/arm/plat-omap/ocpi.c
*
* Minimal OCP bus support for omap16xx
*

2
arch/arm/mach-omap/pm.c → arch/arm/plat-omap/pm.c
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/pm.c
* linux/arch/arm/plat-omap/pm.c
*
* OMAP Power Management Routines
*

2
arch/arm/mach-omap/sleep.S → arch/arm/plat-omap/sleep.S
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/sleep.S
* linux/arch/arm/plat-omap/sleep.S
*
* Low-level OMAP1510/1610 sleep/wakeUp support
*

4
arch/arm/mach-omap/usb.c → arch/arm/plat-omap/usb.c
View File

@ -1,5 +1,5 @@
/*
* arch/arm/mach-omap/usb.c -- platform level USB initialization
* arch/arm/plat-omap/usb.c -- platform level USB initialization
*
* Copyright (C) 2004 Texas Instruments, Inc.
*
@ -326,7 +326,7 @@ static u64 ohci_dmamask = ~(u32)0;
static struct resource ohci_resources[] = {
{
.start = OMAP_OHCI_BASE,
.end = OMAP_OHCI_BASE + 4096,
.end = OMAP_OHCI_BASE + 4096 - 1,
.flags = IORESOURCE_MEM,
},
{

1
include/asm-arm/arch-ixp2000/platform.h
View File

@ -115,6 +115,7 @@ static inline unsigned int ixp2000_is_pcimaster(void)
}
void ixp2000_map_io(void);
void ixp2000_uart_init(void);
void ixp2000_init_irq(void);
void ixp2000_init_time(unsigned long);
unsigned long ixp2000_gettimeoffset(void);

5
include/asm-arm/arch-omap/board-h2.h
View File

@ -34,11 +34,6 @@
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
#define OMAP_NOR_FLASH_SIZE SZ_32M
#define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */
#define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */
/* Samsung NAND flash at CS2B or CS3(NAND Boot) */
#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */
#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */

5
include/asm-arm/arch-omap/board-h3.h
View File

@ -30,11 +30,6 @@
/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
#define OMAP1710_ETHR_START 0x04000300
/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */
#define OMAP_NOR_FLASH_SIZE SZ_32M
#define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */
#define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */
/* Samsung NAND flash at CS2B or CS3(NAND Boot) */
#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */
#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */

5
include/asm-arm/arch-omap/board-osk.h
View File

@ -32,10 +32,5 @@
/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
#define OMAP_OSK_ETHR_START 0x04800300
/* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */
#define OMAP_OSK_NOR_FLASH_BASE 0xD8000000
#define OMAP_OSK_NOR_FLASH_SIZE SZ_32M
#define OMAP_OSK_NOR_FLASH_START 0x00000000
#endif /* __ASM_ARCH_OMAP_OSK_H */

12
include/asm-arm/arch-omap/board.h
View File

@ -16,10 +16,11 @@
/* Different peripheral ids */
#define OMAP_TAG_CLOCK 0x4f01
#define OMAP_TAG_MMC 0x4f02
#define OMAP_TAG_UART 0x4f03
#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
#define OMAP_TAG_USB 0x4f04
#define OMAP_TAG_LCD 0x4f05
#define OMAP_TAG_GPIO_SWITCH 0x4f06
#define OMAP_TAG_UART 0x4f07
#define OMAP_TAG_BOOT_REASON 0x4f80
#define OMAP_TAG_FLASH_PART 0x4f81
@ -35,7 +36,7 @@ struct omap_mmc_config {
s16 mmc1_switch_pin, mmc2_switch_pin;
};
struct omap_uart_config {
struct omap_serial_console_config {
u8 console_uart;
u32 console_speed;
};
@ -82,7 +83,8 @@ struct omap_lcd_config {
*/
#define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000
#define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001
#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001
#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001
#define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002
struct omap_gpio_switch_config {
char name[12];
u16 gpio;
@ -99,6 +101,10 @@ struct omap_boot_reason_config {
char reason_str[12];
};
struct omap_uart_config {
/* Bit field of UARTs present; bit 0 --> UART1 */
unsigned int enabled_uarts;
};
struct omap_board_config_entry {
u16 tag;

4
arch/arm/mach-omap/common.h → include/asm-arm/arch-omap/common.h
View File

@ -1,5 +1,5 @@
/*
* linux/arch/arm/mach-omap/common.h
* linux/include/asm-arm/arch-omap/common.h
*
* Header for code common to all OMAP machines.
*
@ -29,7 +29,7 @@
struct sys_timer;
extern void omap_map_io(void);
extern void omap_map_common_io(void);
extern struct sys_timer omap_timer;
extern void omap_serial_init(int ports[]);

1
include/asm-arm/arch-omap/dma.h
View File

@ -241,6 +241,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
extern dma_addr_t omap_get_dma_src_pos(int lch);
extern dma_addr_t omap_get_dma_dst_pos(int lch);
extern void omap_clear_dma(int lch);
extern int omap_dma_running(void);
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
extern int omap_dma_in_1510_mode(void);

24
include/asm-arm/arch-omap/hardware.h
View File

@ -52,6 +52,19 @@
* ---------------------------------------------------------------------------
*/
/*
* ----------------------------------------------------------------------------
* Timers
* ----------------------------------------------------------------------------
*/
#define OMAP_MPU_TIMER1_BASE (0xfffec500)
#define OMAP_MPU_TIMER2_BASE (0xfffec600)
#define OMAP_MPU_TIMER3_BASE (0xfffec700)
#define MPU_TIMER_FREE (1 << 6)
#define MPU_TIMER_CLOCK_ENABLE (1 << 5)
#define MPU_TIMER_AR (1 << 1)
#define MPU_TIMER_ST (1 << 0)
/*
* ----------------------------------------------------------------------------
* Clocks
@ -78,6 +91,7 @@
/* DSP clock control */
#define DSP_CONFIG_REG_BASE (0xe1008000)
#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
@ -88,6 +102,7 @@
*/
#define ULPD_REG_BASE (0xfffe0800)
#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */
# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */
@ -268,17 +283,10 @@
* Processor specific defines
* ---------------------------------------------------------------------------
*/
#ifdef CONFIG_ARCH_OMAP730
#include "omap730.h"
#endif
#ifdef CONFIG_ARCH_OMAP1510
#include "omap1510.h"
#endif
#ifdef CONFIG_ARCH_OMAP16XX
#include "omap16xx.h"
#endif
/*
* ---------------------------------------------------------------------------

3
include/asm-arm/arch-omap/irqs.h
View File

@ -159,6 +159,7 @@
#define INT_1610_GPIO_BANK3 (41 + IH2_BASE)
#define INT_1610_MMC2 (42 + IH2_BASE)
#define INT_1610_CF (43 + IH2_BASE)
#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE)
#define INT_1610_GPIO_BANK4 (48 + IH2_BASE)
#define INT_1610_SPI (49 + IH2_BASE)
#define INT_1610_DMA_CH6 (53 + IH2_BASE)
@ -238,6 +239,8 @@
#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE)
#define IH_BOARD_BASE (16 + IH_MPUIO_BASE)
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
#ifndef __ASSEMBLY__
extern void omap_init_irq(void);
#endif

28
include/asm-arm/arch-omap/mux.h
View File

@ -231,7 +231,7 @@ typedef enum {
J19_1610_ETM_D6,
J18_1610_ETM_D7,
/* OMAP-1610 GPIO */
/* OMAP16XX GPIO */
P20_1610_GPIO4,
V9_1610_GPIO7,
W8_1610_GPIO9,
@ -241,6 +241,9 @@ typedef enum {
AA20_1610_GPIO_41,
W19_1610_GPIO48,
M7_1610_GPIO62,
V14_16XX_GPIO37,
R9_16XX_GPIO18,
L14_16XX_GPIO49,
/* OMAP-1610 uWire */
V19_1610_UWIRE_SCLK,
@ -285,12 +288,13 @@ typedef enum {
V6_USB2_TXD,
W5_USB2_SE0,
/* UART1 1610 */
/* 16XX UART */
R13_1610_UART1_TX,
V14_1610_UART1_RX,
V14_16XX_UART1_RX,
R14_1610_UART1_CTS,
AA15_1610_UART1_RTS,
R9_16XX_UART2_RX,
L14_16XX_UART3_RX,
/* I2C OMAP-1610 */
I2C_SCL,
@ -332,7 +336,7 @@ typedef enum {
* Table of various FUNC_MUX and PULL_DWN combinations for each device.
* See also reg_cfg_t above for the lookup table.
*/
static reg_cfg_set __initdata_or_module
static const reg_cfg_set __initdata_or_module
reg_cfg_table[] = {
/*
* description mux mode mux pull pull pull pu_pd pu dbg
@ -455,7 +459,7 @@ MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1)
MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1)
MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1)
/* OMAP-1610 GPIO */
/* OMAP16XX GPIO */
MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1)
@ -465,6 +469,9 @@ MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1)
MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1)
MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0)
MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0)
MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0)
/* OMAP-1610 uWire */
MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1)
@ -503,16 +510,17 @@ MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("R8_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
/* UART1 */
/* 16XX UART */
MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1)
MUX_CFG("V14_1610_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1)
MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1)
MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1)
MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1)
/* I2C interface */
MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0)

32
include/asm-arm/arch-omap/omap16xx.h
View File

@ -183,5 +183,37 @@
#define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00)
#define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04)
/*
* ---------------------------------------------------------------------------
* Watchdog timer
* ---------------------------------------------------------------------------
*/
/* 32-bit Watchdog timer in OMAP 16XX */
#define OMAP_16XX_WATCHDOG_BASE (0xfffeb000)
#define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00)
#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10)
#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14)
#define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24)
#define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28)
#define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c)
#define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30)
#define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34)
#define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48)
#define WCLR_PRE_SHIFT 5
#define WCLR_PTV_SHIFT 2
#define WWPS_W_PEND_WSPR (1 << 4)
#define WWPS_W_PEND_WTGR (1 << 3)
#define WWPS_W_PEND_WLDR (1 << 2)
#define WWPS_W_PEND_WCRR (1 << 1)
#define WWPS_W_PEND_WCLR (1 << 0)
#define WSPR_ENABLE_0 (0x0000bbbb)
#define WSPR_ENABLE_1 (0x00004444)
#define WSPR_DISABLE_0 (0x0000aaaa)
#define WSPR_DISABLE_1 (0x00005555)
#endif /* __ASM_ARCH_OMAP16XX_H */

21
include/asm-arm/arch-omap/system.h
View File

@ -5,7 +5,9 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <linux/config.h>
#include <asm/mach-types.h>
#include <asm/arch/hardware.h>
#include <asm/mach-types.h>
static inline void arch_idle(void)
{
@ -14,7 +16,24 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
omap_writew(1, ARM_RSTCT1);
#ifdef CONFIG_ARCH_OMAP16XX
/*
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
* "Global Software Reset Affects Traffic Controller Frequency".
*/
if (cpu_is_omap5912()) {
omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4),
DPLL_CTL);
omap_writew(0x8, ARM_RSTCT1);
}
#endif
#ifdef CONFIG_MACH_VOICEBLUE
if (machine_is_voiceblue())
voiceblue_reset();
else
#endif
omap_writew(1, ARM_RSTCT1);
}
#endif