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powerpc/perf: Replace raw event hex values with #defines
Minor cleanup patch to replace the raw event hex values in power8-pmu.c with #defines. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -49,3 +49,43 @@ EVENT(PM_L3_PREF_ALL, 0x4e052)
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EVENT(PM_DTLB_MISS, 0x300fc)
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/* ITLB Reloaded */
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EVENT(PM_ITLB_MISS, 0x400fc)
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/* Run_Instructions */
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EVENT(PM_RUN_INST_CMPL, 0x500fa)
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/* Alternate event code for PM_RUN_INST_CMPL */
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EVENT(PM_RUN_INST_CMPL_ALT, 0x400fa)
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/* Run_cycles */
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EVENT(PM_RUN_CYC, 0x600f4)
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/* Alternate event code for Run_cycles */
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EVENT(PM_RUN_CYC_ALT, 0x200f4)
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/* Marked store completed */
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EVENT(PM_MRK_ST_CMPL, 0x10134)
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/* Alternate event code for Marked store completed */
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EVENT(PM_MRK_ST_CMPL_ALT, 0x301e2)
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/* Marked two path branch */
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EVENT(PM_BR_MRK_2PATH, 0x10138)
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/* Alternate event code for PM_BR_MRK_2PATH */
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EVENT(PM_BR_MRK_2PATH_ALT, 0x40138)
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/* L3 castouts in Mepf state */
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EVENT(PM_L3_CO_MEPF, 0x18082)
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/* Alternate event code for PM_L3_CO_MEPF */
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EVENT(PM_L3_CO_MEPF_ALT, 0x3e05e)
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/* Data cache was reloaded from a location other than L2 due to a marked load */
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EVENT(PM_MRK_DATA_FROM_L2MISS, 0x1d14e)
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/* Alternate event code for PM_MRK_DATA_FROM_L2MISS */
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EVENT(PM_MRK_DATA_FROM_L2MISS_ALT, 0x401e8)
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/* Alternate event code for PM_CMPLU_STALL */
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EVENT(PM_CMPLU_STALL_ALT, 0x1e054)
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/* Two path branch */
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EVENT(PM_BR_2PATH, 0x20036)
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/* Alternate event code for PM_BR_2PATH */
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EVENT(PM_BR_2PATH_ALT, 0x40036)
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/* # PPC Dispatched */
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EVENT(PM_INST_DISP, 0x200f2)
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/* Alternate event code for PM_INST_DISP */
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EVENT(PM_INST_DISP_ALT, 0x300f2)
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/* Marked filter Match */
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EVENT(PM_MRK_FILT_MATCH, 0x2013c)
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/* Alternate event code for PM_MRK_FILT_MATCH */
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EVENT(PM_MRK_FILT_MATCH_ALT, 0x3012e)
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/* Alternate event code for PM_LD_MISS_L1 */
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EVENT(PM_LD_MISS_L1_ALT, 0x400f0)
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@ -274,7 +274,8 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long
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/* Ignore Linux defined bits when checking event below */
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base_event = event & ~EVENT_LINUX_MASK;
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if (pmc >= 5 && base_event != 0x500fa && base_event != 0x600f4)
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if (pmc >= 5 && base_event != PM_RUN_INST_CMPL &&
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base_event != PM_RUN_CYC)
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return -1;
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mask |= CNST_PMC_MASK(pmc);
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@ -488,17 +489,17 @@ static int power8_compute_mmcr(u64 event[], int n_ev,
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/* Table of alternatives, sorted by column 0 */
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static const unsigned int event_alternatives[][MAX_ALT] = {
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{ 0x10134, 0x301e2 }, /* PM_MRK_ST_CMPL */
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{ 0x10138, 0x40138 }, /* PM_BR_MRK_2PATH */
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{ 0x18082, 0x3e05e }, /* PM_L3_CO_MEPF */
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{ 0x1d14e, 0x401e8 }, /* PM_MRK_DATA_FROM_L2MISS */
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{ 0x1e054, 0x4000a }, /* PM_CMPLU_STALL */
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{ 0x20036, 0x40036 }, /* PM_BR_2PATH */
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{ 0x200f2, 0x300f2 }, /* PM_INST_DISP */
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{ 0x200f4, 0x600f4 }, /* PM_RUN_CYC */
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{ 0x2013c, 0x3012e }, /* PM_MRK_FILT_MATCH */
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{ 0x3e054, 0x400f0 }, /* PM_LD_MISS_L1 */
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{ 0x400fa, 0x500fa }, /* PM_RUN_INST_CMPL */
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{ PM_MRK_ST_CMPL, PM_MRK_ST_CMPL_ALT },
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{ PM_BR_MRK_2PATH, PM_BR_MRK_2PATH_ALT },
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{ PM_L3_CO_MEPF, PM_L3_CO_MEPF_ALT },
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{ PM_MRK_DATA_FROM_L2MISS, PM_MRK_DATA_FROM_L2MISS_ALT },
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{ PM_CMPLU_STALL_ALT, PM_CMPLU_STALL },
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{ PM_BR_2PATH, PM_BR_2PATH_ALT },
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{ PM_INST_DISP, PM_INST_DISP_ALT },
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{ PM_RUN_CYC_ALT, PM_RUN_CYC },
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{ PM_MRK_FILT_MATCH, PM_MRK_FILT_MATCH_ALT },
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{ PM_LD_MISS_L1, PM_LD_MISS_L1_ALT },
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{ PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL },
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};
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/*
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@ -546,17 +547,17 @@ static int power8_get_alternatives(u64 event, unsigned int flags, u64 alt[])
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j = num_alt;
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for (i = 0; i < num_alt; ++i) {
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switch (alt[i]) {
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case 0x1e: /* PM_CYC */
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alt[j++] = 0x600f4; /* PM_RUN_CYC */
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case PM_CYC:
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alt[j++] = PM_RUN_CYC;
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break;
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case 0x600f4: /* PM_RUN_CYC */
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alt[j++] = 0x1e;
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case PM_RUN_CYC:
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alt[j++] = PM_CYC;
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break;
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case 0x2: /* PM_PPC_CMPL */
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alt[j++] = 0x500fa; /* PM_RUN_INST_CMPL */
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case PM_INST_CMPL:
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alt[j++] = PM_RUN_INST_CMPL;
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break;
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case 0x500fa: /* PM_RUN_INST_CMPL */
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alt[j++] = 0x2; /* PM_PPC_CMPL */
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case PM_RUN_INST_CMPL:
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alt[j++] = PM_INST_CMPL;
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break;
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}
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}
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