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c_can_pci: generic module for C_CAN/D_CAN on PCI
Signed-off-by: Federico Vaga <federico.vaga@gmail.com> Acked-by: Giancarlo Asnaghi <giancarlo.asnaghi@st.com> Cc: Alan Cox <alan@linux.intel.com> Acked-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Bhupesh Sharma <bhupesh.sharma@st.com> [mkl: fix call to pci_iounmap] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This commit is contained in:
Federico Vaga
Marc Kleine-Budde
parent
b31525d16b
commit
5b92da0443
@ -13,4 +13,11 @@ config CAN_C_CAN_PLATFORM
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boards from ST Microelectronics (http://www.st.com) like the
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SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com)
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boards like am335x, dm814x, dm813x and dm811x.
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config CAN_C_CAN_PCI
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tristate "Generic PCI Bus based C_CAN/D_CAN driver"
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depends on PCI
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---help---
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This driver adds support for the C_CAN/D_CAN chips connected
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to the PCI bus.
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endif
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@ -4,5 +4,6 @@
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obj-$(CONFIG_CAN_C_CAN) += c_can.o
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obj-$(CONFIG_CAN_C_CAN_PLATFORM) += c_can_platform.o
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obj-$(CONFIG_CAN_C_CAN_PCI) += c_can_pci.o
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ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
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236
drivers/net/can/c_can/c_can_pci.c
Normal file
236
drivers/net/can/c_can/c_can_pci.c
Normal file
@ -0,0 +1,236 @@
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/*
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* PCI bus driver for Bosch C_CAN/D_CAN controller
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*
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* Copyright (C) 2012 Federico Vaga <federico.vaga@gmail.com>
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*
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* Borrowed from c_can_platform.c
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/clk.h>
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#include <linux/pci.h>
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#include <linux/can/dev.h>
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#include "c_can.h"
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enum c_can_pci_reg_align {
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C_CAN_REG_ALIGN_16,
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C_CAN_REG_ALIGN_32,
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};
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struct c_can_pci_data {
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/* Specify if is C_CAN or D_CAN */
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enum c_can_dev_id type;
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/* Set the register alignment in the memory */
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enum c_can_pci_reg_align reg_align;
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/* Set the frequency if clk is not usable */
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unsigned int freq;
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};
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/*
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* 16-bit c_can registers can be arranged differently in the memory
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* architecture of different implementations. For example: 16-bit
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* registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
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* Handle the same by providing a common read/write interface.
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*/
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static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,
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enum reg index)
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{
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return readw(priv->base + priv->regs[index]);
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}
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static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,
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enum reg index, u16 val)
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{
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writew(val, priv->base + priv->regs[index]);
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}
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static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,
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enum reg index)
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{
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return readw(priv->base + 2 * priv->regs[index]);
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}
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static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,
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enum reg index, u16 val)
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{
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writew(val, priv->base + 2 * priv->regs[index]);
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}
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static int __devinit c_can_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct c_can_pci_data *c_can_pci_data = (void *)ent->driver_data;
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struct c_can_priv *priv;
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struct net_device *dev;
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void __iomem *addr;
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struct clk *clk;
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int ret;
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ret = pci_enable_device(pdev);
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if (ret) {
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dev_err(&pdev->dev, "pci_enable_device FAILED\n");
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goto out;
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}
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ret = pci_request_regions(pdev, KBUILD_MODNAME);
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if (ret) {
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dev_err(&pdev->dev, "pci_request_regions FAILED\n");
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goto out_disable_device;
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}
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pci_set_master(pdev);
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pci_enable_msi(pdev);
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addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
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if (!addr) {
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dev_err(&pdev->dev,
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"device has no PCI memory resources, "
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"failing adapter\n");
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ret = -ENOMEM;
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goto out_release_regions;
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}
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/* allocate the c_can device */
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dev = alloc_c_can_dev();
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if (!dev) {
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ret = -ENOMEM;
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goto out_iounmap;
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}
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priv = netdev_priv(dev);
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pci_set_drvdata(pdev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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dev->irq = pdev->irq;
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priv->base = addr;
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if (!c_can_pci_data->freq) {
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/* get the appropriate clk */
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clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "no clock defined\n");
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ret = -ENODEV;
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goto out_free_c_can;
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}
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priv->can.clock.freq = clk_get_rate(clk);
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priv->priv = clk;
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} else {
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priv->can.clock.freq = c_can_pci_data->freq;
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priv->priv = NULL;
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}
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/* Configure CAN type */
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switch (c_can_pci_data->type) {
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case C_CAN_DEVTYPE:
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priv->regs = reg_map_c_can;
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break;
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case D_CAN_DEVTYPE:
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priv->regs = reg_map_d_can;
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priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
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break;
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default:
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ret = -EINVAL;
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goto out_free_clock;
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}
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/* Configure access to registers */
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switch (c_can_pci_data->reg_align) {
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case C_CAN_REG_ALIGN_32:
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priv->read_reg = c_can_pci_read_reg_aligned_to_32bit;
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priv->write_reg = c_can_pci_write_reg_aligned_to_32bit;
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break;
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case C_CAN_REG_ALIGN_16:
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priv->read_reg = c_can_pci_read_reg_aligned_to_16bit;
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priv->write_reg = c_can_pci_write_reg_aligned_to_16bit;
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break;
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default:
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ret = -EINVAL;
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goto out_free_clock;
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}
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ret = register_c_can_dev(dev);
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if (ret) {
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dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
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KBUILD_MODNAME, ret);
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goto out_free_clock;
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}
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dev_dbg(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
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KBUILD_MODNAME, priv->regs, dev->irq);
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return 0;
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out_free_clock:
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if (priv->priv)
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clk_put(priv->priv);
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out_free_c_can:
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pci_set_drvdata(pdev, NULL);
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free_c_can_dev(dev);
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out_iounmap:
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pci_iounmap(pdev, addr);
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out_release_regions:
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pci_disable_msi(pdev);
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pci_clear_master(pdev);
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pci_release_regions(pdev);
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out_disable_device:
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pci_disable_device(pdev);
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out:
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return ret;
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}
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static void __devexit c_can_pci_remove(struct pci_dev *pdev)
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{
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struct net_device *dev = pci_get_drvdata(pdev);
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struct c_can_priv *priv = netdev_priv(dev);
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unregister_c_can_dev(dev);
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if (priv->priv)
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clk_put(priv->priv);
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pci_set_drvdata(pdev, NULL);
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free_c_can_dev(dev);
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pci_iounmap(pdev, priv->base);
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pci_disable_msi(pdev);
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pci_clear_master(pdev);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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}
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static struct c_can_pci_data c_can_sta2x11= {
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.type = C_CAN_DEVTYPE,
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.reg_align = C_CAN_REG_ALIGN_32,
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.freq = 52000000, /* 52 Mhz */
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};
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#define C_CAN_ID(_vend, _dev, _driverdata) { \
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PCI_DEVICE(_vend, _dev), \
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.driver_data = (unsigned long)&_driverdata, \
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}
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static DEFINE_PCI_DEVICE_TABLE(c_can_pci_tbl) = {
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C_CAN_ID(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_CAN,
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c_can_sta2x11),
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{},
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};
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static struct pci_driver c_can_pci_driver = {
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.name = KBUILD_MODNAME,
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.id_table = c_can_pci_tbl,
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.probe = c_can_pci_probe,
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.remove = __devexit_p(c_can_pci_remove),
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};
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module_pci_driver(c_can_pci_driver);
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MODULE_AUTHOR("Federico Vaga <federico.vaga@gmail.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("PCI CAN bus driver for Bosch C_CAN/D_CAN controller");
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MODULE_DEVICE_TABLE(pci, c_can_pci_tbl);
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