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KVM: SVM: Modify AVIC GATag to support max number of 512 vCPUs
Define AVIC_VCPU_ID_MASK based on AVIC_PHYSICAL_MAX_INDEX, i.e. the mask
that effectively controls the largest guest physical APIC ID supported by
x2AVIC, instead of hardcoding the number of bits to 8 (and the number of
VM bits to 24).
The AVIC GATag is programmed into the AMD IOMMU IRTE to provide a
reference back to KVM in case the IOMMU cannot inject an interrupt into a
non-running vCPU. In such a case, the IOMMU notifies software by creating
a GALog entry with the corresponded GATag, and KVM then uses the GATag to
find the correct VM+vCPU to kick. Dropping bit 8 from the GATag results
in kicking the wrong vCPU when targeting vCPUs with x2APIC ID > 255.
Fixes: 4d1d7942e3
("KVM: SVM: Introduce logic to (de)activate x2AVIC mode")
Cc: stable@vger.kernel.org
Reported-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Co-developed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Tested-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Message-Id: <20230207002156.521736-3-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
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@ -27,19 +27,29 @@
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#include "irq.h"
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#include "svm.h"
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/* AVIC GATAG is encoded using VM and VCPU IDs */
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#define AVIC_VCPU_ID_BITS 8
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#define AVIC_VCPU_ID_MASK ((1 << AVIC_VCPU_ID_BITS) - 1)
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/*
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* Encode the arbitrary VM ID and the vCPU's default APIC ID, i.e the vCPU ID,
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* into the GATag so that KVM can retrieve the correct vCPU from a GALog entry
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* if an interrupt can't be delivered, e.g. because the vCPU isn't running.
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*
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* For the vCPU ID, use however many bits are currently allowed for the max
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* guest physical APIC ID (limited by the size of the physical ID table), and
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* use whatever bits remain to assign arbitrary AVIC IDs to VMs. Note, the
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* size of the GATag is defined by hardware (32 bits), but is an opaque value
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* as far as hardware is concerned.
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*/
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#define AVIC_VCPU_ID_MASK AVIC_PHYSICAL_MAX_INDEX_MASK
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#define AVIC_VM_ID_BITS 24
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#define AVIC_VM_ID_NR (1 << AVIC_VM_ID_BITS)
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#define AVIC_VM_ID_MASK ((1 << AVIC_VM_ID_BITS) - 1)
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#define AVIC_VM_ID_SHIFT HWEIGHT32(AVIC_PHYSICAL_MAX_INDEX_MASK)
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#define AVIC_VM_ID_MASK (GENMASK(31, AVIC_VM_ID_SHIFT) >> AVIC_VM_ID_SHIFT)
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#define AVIC_GATAG(x, y) (((x & AVIC_VM_ID_MASK) << AVIC_VCPU_ID_BITS) | \
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#define AVIC_GATAG(x, y) (((x & AVIC_VM_ID_MASK) << AVIC_VM_ID_SHIFT) | \
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(y & AVIC_VCPU_ID_MASK))
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#define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK)
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#define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VM_ID_SHIFT) & AVIC_VM_ID_MASK)
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#define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK)
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static_assert(AVIC_GATAG(AVIC_VM_ID_MASK, AVIC_VCPU_ID_MASK) == -1u);
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static bool force_avic;
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module_param_unsafe(force_avic, bool, 0444);
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