clk: en7523: fix rate divider for slic and spi clocks

Introduce div_offset field in en_clk_desc struct in order to fix rate
divider estimation in en7523_get_div routine for slic and spi fixed
rate clocks.
Moreover, fix base_shift for crypto clock.

Fixes: 1e62731791 ("clk: en7523: Add clock driver for Airoha EN7523 SoC")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/c491bdea05d847f1f1294b94f14725d292eb95d0.1718615934.git.lorenzo@kernel.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Lorenzo Bianconi 2024-06-17 11:25:49 +02:00 committed by Stephen Boyd
parent bf288bd25d
commit 58c53d4314

View File

@ -62,6 +62,7 @@ struct en_clk_desc {
u8 div_shift; u8 div_shift;
u16 div_val0; u16 div_val0;
u8 div_step; u8 div_step;
u8 div_offset;
}; };
struct en_clk_gate { struct en_clk_gate {
@ -106,6 +107,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3, .div_bits = 3,
.div_shift = 0, .div_shift = 0,
.div_step = 1, .div_step = 1,
.div_offset = 1,
}, { }, {
.id = EN7523_CLK_EMI, .id = EN7523_CLK_EMI,
.name = "emi", .name = "emi",
@ -119,6 +121,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3, .div_bits = 3,
.div_shift = 0, .div_shift = 0,
.div_step = 1, .div_step = 1,
.div_offset = 1,
}, { }, {
.id = EN7523_CLK_BUS, .id = EN7523_CLK_BUS,
.name = "bus", .name = "bus",
@ -132,6 +135,7 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3, .div_bits = 3,
.div_shift = 0, .div_shift = 0,
.div_step = 1, .div_step = 1,
.div_offset = 1,
}, { }, {
.id = EN7523_CLK_SLIC, .id = EN7523_CLK_SLIC,
.name = "slic", .name = "slic",
@ -172,13 +176,14 @@ static const struct en_clk_desc en7523_base_clks[] = {
.div_bits = 3, .div_bits = 3,
.div_shift = 0, .div_shift = 0,
.div_step = 1, .div_step = 1,
.div_offset = 1,
}, { }, {
.id = EN7523_CLK_CRYPTO, .id = EN7523_CLK_CRYPTO,
.name = "crypto", .name = "crypto",
.base_reg = REG_CRYPTO_CLKSRC, .base_reg = REG_CRYPTO_CLKSRC,
.base_bits = 1, .base_bits = 1,
.base_shift = 8, .base_shift = 0,
.base_values = emi_base, .base_values = emi_base,
.n_base_values = ARRAY_SIZE(emi_base), .n_base_values = ARRAY_SIZE(emi_base),
} }
@ -281,7 +286,7 @@ static u32 en7523_get_div(void __iomem *base, int i)
if (!val && desc->div_val0) if (!val && desc->div_val0)
return desc->div_val0; return desc->div_val0;
return (val + 1) * desc->div_step; return (val + desc->div_offset) * desc->div_step;
} }
static int en7523_pci_is_enabled(struct clk_hw *hw) static int en7523_pci_is_enabled(struct clk_hw *hw)