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Merge branch 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Two some radeon display fixes. * 'drm-fixes-4.6' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: fix PLL sharing on DCE6.1 (v2) drm/radeon: fix DP link training issue with second 4K monitor
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commit
58a6e2e579
@ -1742,6 +1742,7 @@ static u32 radeon_get_pll_use_mask(struct drm_crtc *crtc)
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static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct drm_crtc *test_crtc;
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struct radeon_crtc *test_radeon_crtc;
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@ -1751,6 +1752,10 @@ static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc)
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test_radeon_crtc = to_radeon_crtc(test_crtc);
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if (test_radeon_crtc->encoder &&
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ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_radeon_crtc->encoder))) {
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/* PPLL2 is exclusive to UNIPHYA on DCE61 */
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if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) &&
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test_radeon_crtc->pll_id == ATOM_PPLL2)
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continue;
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/* for DP use the same PLL for all */
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if (test_radeon_crtc->pll_id != ATOM_PPLL_INVALID)
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return test_radeon_crtc->pll_id;
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@ -1772,6 +1777,7 @@ static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct drm_crtc *test_crtc;
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struct radeon_crtc *test_radeon_crtc;
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u32 adjusted_clock, test_adjusted_clock;
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@ -1787,6 +1793,10 @@ static int radeon_get_shared_nondp_ppll(struct drm_crtc *crtc)
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test_radeon_crtc = to_radeon_crtc(test_crtc);
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if (test_radeon_crtc->encoder &&
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!ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_radeon_crtc->encoder))) {
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/* PPLL2 is exclusive to UNIPHYA on DCE61 */
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if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) &&
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test_radeon_crtc->pll_id == ATOM_PPLL2)
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continue;
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/* check if we are already driving this connector with another crtc */
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if (test_radeon_crtc->connector == radeon_crtc->connector) {
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/* if we are, return that pll */
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@ -105,7 +105,7 @@ radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg
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tmp &= AUX_HPD_SEL(0x7);
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tmp |= AUX_HPD_SEL(chan->rec.hpd);
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tmp |= AUX_EN | AUX_LS_READ_EN;
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tmp |= AUX_EN | AUX_LS_READ_EN | AUX_HPD_DISCON(0x1);
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WREG32(AUX_CONTROL + aux_offset[instance], tmp);
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