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scsi: elx: efct: RQ buffer, memory pool allocation and deallocation APIs
Add driver definitions for: - RQ data buffer allocation and deallocate. - Memory pool allocation and deallocation APIs. - Mailbox command submission and completion routines. Link: https://lore.kernel.org/r/20210601235512.20104-21-jsmart2021@gmail.com Reviewed-by: Daniel Wagner <dwagner@suse.de> Reviewed-by: Hannes Reinecke <hare@suse.de> Co-developed-by: Ram Vegesna <ram.vegesna@broadcom.com> Signed-off-by: Ram Vegesna <ram.vegesna@broadcom.com> Signed-off-by: James Smart <jsmart2021@gmail.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
James Smart
Martin K. Petersen
parent
e10fc23359
commit
580c0255e4
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@ -1151,3 +1151,409 @@ efct_get_wwpn(struct efct_hw *hw)
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memcpy(p, sli->wwpn, sizeof(p));
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return get_unaligned_be64(p);
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}
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static struct efc_hw_rq_buffer *
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efct_hw_rx_buffer_alloc(struct efct_hw *hw, u32 rqindex, u32 count,
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u32 size)
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{
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struct efct *efct = hw->os;
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struct efc_hw_rq_buffer *rq_buf = NULL;
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struct efc_hw_rq_buffer *prq;
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u32 i;
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if (!count)
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return NULL;
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rq_buf = kmalloc_array(count, sizeof(*rq_buf), GFP_KERNEL);
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if (!rq_buf)
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return NULL;
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memset(rq_buf, 0, sizeof(*rq_buf) * count);
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for (i = 0, prq = rq_buf; i < count; i ++, prq++) {
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prq->rqindex = rqindex;
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prq->dma.size = size;
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prq->dma.virt = dma_alloc_coherent(&efct->pci->dev,
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prq->dma.size,
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&prq->dma.phys,
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GFP_DMA);
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if (!prq->dma.virt) {
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efc_log_err(hw->os, "DMA allocation failed\n");
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kfree(rq_buf);
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return NULL;
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}
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}
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return rq_buf;
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}
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static void
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efct_hw_rx_buffer_free(struct efct_hw *hw,
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struct efc_hw_rq_buffer *rq_buf,
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u32 count)
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{
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struct efct *efct = hw->os;
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u32 i;
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struct efc_hw_rq_buffer *prq;
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if (rq_buf) {
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for (i = 0, prq = rq_buf; i < count; i++, prq++) {
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dma_free_coherent(&efct->pci->dev,
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prq->dma.size, prq->dma.virt,
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prq->dma.phys);
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memset(&prq->dma, 0, sizeof(struct efc_dma));
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}
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kfree(rq_buf);
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}
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}
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int
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efct_hw_rx_allocate(struct efct_hw *hw)
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{
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struct efct *efct = hw->os;
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u32 i;
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int rc = 0;
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u32 rqindex = 0;
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u32 hdr_size = EFCT_HW_RQ_SIZE_HDR;
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u32 payload_size = hw->config.rq_default_buffer_size;
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rqindex = 0;
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for (i = 0; i < hw->hw_rq_count; i++) {
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struct hw_rq *rq = hw->hw_rq[i];
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/* Allocate header buffers */
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rq->hdr_buf = efct_hw_rx_buffer_alloc(hw, rqindex,
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rq->entry_count,
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hdr_size);
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if (!rq->hdr_buf) {
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efc_log_err(efct, "rx_buffer_alloc hdr_buf failed\n");
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rc = -EIO;
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break;
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}
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efc_log_debug(hw->os,
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"rq[%2d] rq_id %02d header %4d by %4d bytes\n",
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i, rq->hdr->id, rq->entry_count, hdr_size);
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rqindex++;
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/* Allocate payload buffers */
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rq->payload_buf = efct_hw_rx_buffer_alloc(hw, rqindex,
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rq->entry_count,
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payload_size);
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if (!rq->payload_buf) {
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efc_log_err(efct, "rx_buffer_alloc fb_buf failed\n");
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rc = -EIO;
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break;
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}
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efc_log_debug(hw->os,
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"rq[%2d] rq_id %02d default %4d by %4d bytes\n",
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i, rq->data->id, rq->entry_count, payload_size);
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rqindex++;
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}
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return rc ? -EIO : 0;
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}
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int
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efct_hw_rx_post(struct efct_hw *hw)
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{
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u32 i;
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u32 idx;
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u32 rq_idx;
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int rc = 0;
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if (!hw->seq_pool) {
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u32 count = 0;
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for (i = 0; i < hw->hw_rq_count; i++)
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count += hw->hw_rq[i]->entry_count;
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hw->seq_pool = kmalloc_array(count,
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sizeof(struct efc_hw_sequence), GFP_KERNEL);
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if (!hw->seq_pool)
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return -ENOMEM;
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}
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/*
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* In RQ pair mode, we MUST post the header and payload buffer at the
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* same time.
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*/
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for (rq_idx = 0, idx = 0; rq_idx < hw->hw_rq_count; rq_idx++) {
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struct hw_rq *rq = hw->hw_rq[rq_idx];
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for (i = 0; i < rq->entry_count - 1; i++) {
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struct efc_hw_sequence *seq;
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seq = hw->seq_pool + idx;
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idx++;
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seq->header = &rq->hdr_buf[i];
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seq->payload = &rq->payload_buf[i];
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rc = efct_hw_sequence_free(hw, seq);
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if (rc)
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break;
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}
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if (rc)
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break;
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}
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if (rc && hw->seq_pool)
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kfree(hw->seq_pool);
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return rc;
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}
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void
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efct_hw_rx_free(struct efct_hw *hw)
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{
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u32 i;
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/* Free hw_rq buffers */
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for (i = 0; i < hw->hw_rq_count; i++) {
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struct hw_rq *rq = hw->hw_rq[i];
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if (rq) {
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efct_hw_rx_buffer_free(hw, rq->hdr_buf,
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rq->entry_count);
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rq->hdr_buf = NULL;
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efct_hw_rx_buffer_free(hw, rq->payload_buf,
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rq->entry_count);
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rq->payload_buf = NULL;
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}
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}
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}
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static int
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efct_hw_cmd_submit_pending(struct efct_hw *hw)
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{
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int rc = 0;
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/* Assumes lock held */
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/* Only submit MQE if there's room */
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while (hw->cmd_head_count < (EFCT_HW_MQ_DEPTH - 1) &&
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!list_empty(&hw->cmd_pending)) {
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struct efct_command_ctx *ctx;
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ctx = list_first_entry(&hw->cmd_pending,
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struct efct_command_ctx, list_entry);
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if (!ctx)
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break;
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list_del_init(&ctx->list_entry);
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list_add_tail(&ctx->list_entry, &hw->cmd_head);
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hw->cmd_head_count++;
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if (sli_mq_write(&hw->sli, hw->mq, ctx->buf) < 0) {
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efc_log_debug(hw->os,
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"sli_queue_write failed: %d\n", rc);
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rc = -EIO;
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break;
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}
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}
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return rc;
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}
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int
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efct_hw_command(struct efct_hw *hw, u8 *cmd, u32 opts, void *cb, void *arg)
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{
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int rc = -EIO;
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unsigned long flags = 0;
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void *bmbx = NULL;
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/*
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* If the chip is in an error state (UE'd) then reject this mailbox
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* command.
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*/
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if (sli_fw_error_status(&hw->sli) > 0) {
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efc_log_crit(hw->os, "Chip in an error state - reset needed\n");
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efc_log_crit(hw->os, "status=%#x error1=%#x error2=%#x\n",
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sli_reg_read_status(&hw->sli),
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sli_reg_read_err1(&hw->sli),
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sli_reg_read_err2(&hw->sli));
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return -EIO;
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}
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/*
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* Send a mailbox command to the hardware, and either wait for
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* a completion (EFCT_CMD_POLL) or get an optional asynchronous
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* completion (EFCT_CMD_NOWAIT).
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*/
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if (opts == EFCT_CMD_POLL) {
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mutex_lock(&hw->bmbx_lock);
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bmbx = hw->sli.bmbx.virt;
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memset(bmbx, 0, SLI4_BMBX_SIZE);
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memcpy(bmbx, cmd, SLI4_BMBX_SIZE);
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if (sli_bmbx_command(&hw->sli) == 0) {
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rc = 0;
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memcpy(cmd, bmbx, SLI4_BMBX_SIZE);
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}
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mutex_unlock(&hw->bmbx_lock);
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} else if (opts == EFCT_CMD_NOWAIT) {
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struct efct_command_ctx *ctx = NULL;
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if (hw->state != EFCT_HW_STATE_ACTIVE) {
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efc_log_err(hw->os, "Can't send command, HW state=%d\n",
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hw->state);
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return -EIO;
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}
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ctx = mempool_alloc(hw->cmd_ctx_pool, GFP_ATOMIC);
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if (!ctx)
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return -ENOSPC;
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memset(ctx, 0, sizeof(struct efct_command_ctx));
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if (cb) {
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ctx->cb = cb;
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ctx->arg = arg;
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}
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memcpy(ctx->buf, cmd, SLI4_BMBX_SIZE);
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ctx->ctx = hw;
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spin_lock_irqsave(&hw->cmd_lock, flags);
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/* Add to pending list */
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INIT_LIST_HEAD(&ctx->list_entry);
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list_add_tail(&ctx->list_entry, &hw->cmd_pending);
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/* Submit as much of the pending list as we can */
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rc = efct_hw_cmd_submit_pending(hw);
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spin_unlock_irqrestore(&hw->cmd_lock, flags);
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}
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return rc;
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}
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static int
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efct_hw_command_process(struct efct_hw *hw, int status, u8 *mqe,
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size_t size)
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{
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struct efct_command_ctx *ctx = NULL;
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unsigned long flags = 0;
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spin_lock_irqsave(&hw->cmd_lock, flags);
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if (!list_empty(&hw->cmd_head)) {
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ctx = list_first_entry(&hw->cmd_head,
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struct efct_command_ctx, list_entry);
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list_del_init(&ctx->list_entry);
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}
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if (!ctx) {
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efc_log_err(hw->os, "no command context\n");
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spin_unlock_irqrestore(&hw->cmd_lock, flags);
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return -EIO;
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}
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hw->cmd_head_count--;
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/* Post any pending requests */
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efct_hw_cmd_submit_pending(hw);
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spin_unlock_irqrestore(&hw->cmd_lock, flags);
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if (ctx->cb) {
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memcpy(ctx->buf, mqe, size);
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ctx->cb(hw, status, ctx->buf, ctx->arg);
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}
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mempool_free(ctx, hw->cmd_ctx_pool);
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return 0;
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}
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static int
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efct_hw_mq_process(struct efct_hw *hw,
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int status, struct sli4_queue *mq)
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{
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u8 mqe[SLI4_BMBX_SIZE];
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int rc;
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rc = sli_mq_read(&hw->sli, mq, mqe);
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if (!rc)
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rc = efct_hw_command_process(hw, status, mqe, mq->size);
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return rc;
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}
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static int
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efct_hw_command_cancel(struct efct_hw *hw)
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{
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unsigned long flags = 0;
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int rc = 0;
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spin_lock_irqsave(&hw->cmd_lock, flags);
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/*
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* Manually clean up remaining commands. Note: since this calls
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* efct_hw_command_process(), we'll also process the cmd_pending
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* list, so no need to manually clean that out.
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*/
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while (!list_empty(&hw->cmd_head)) {
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u8 mqe[SLI4_BMBX_SIZE] = { 0 };
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struct efct_command_ctx *ctx;
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ctx = list_first_entry(&hw->cmd_head,
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struct efct_command_ctx, list_entry);
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efc_log_debug(hw->os, "hung command %08x\n",
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!ctx ? U32_MAX :
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(!ctx->buf ? U32_MAX : *((u32 *)ctx->buf)));
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spin_unlock_irqrestore(&hw->cmd_lock, flags);
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rc = efct_hw_command_process(hw, -1, mqe, SLI4_BMBX_SIZE);
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spin_lock_irqsave(&hw->cmd_lock, flags);
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}
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spin_unlock_irqrestore(&hw->cmd_lock, flags);
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return rc;
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}
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static void
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efct_mbox_rsp_cb(struct efct_hw *hw, int status, u8 *mqe, void *arg)
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{
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struct efct_mbox_rqst_ctx *ctx = arg;
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if (ctx) {
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if (ctx->callback)
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(*ctx->callback)(hw->os->efcport, status, mqe,
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ctx->arg);
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mempool_free(ctx, hw->mbox_rqst_pool);
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}
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}
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int
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efct_issue_mbox_rqst(void *base, void *cmd, void *cb, void *arg)
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{
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struct efct_mbox_rqst_ctx *ctx;
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struct efct *efct = base;
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struct efct_hw *hw = &efct->hw;
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int rc;
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/*
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* Allocate a callback context (which includes the mbox cmd buffer),
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* we need this to be persistent as the mbox cmd submission may be
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* queued and executed later execution.
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*/
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ctx = mempool_alloc(hw->mbox_rqst_pool, GFP_ATOMIC);
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if (!ctx)
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return -EIO;
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ctx->callback = cb;
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ctx->arg = arg;
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rc = efct_hw_command(hw, cmd, EFCT_CMD_NOWAIT, efct_mbox_rsp_cb, ctx);
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if (rc) {
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efc_log_err(efct, "issue mbox rqst failure rc:%d\n", rc);
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mempool_free(ctx, hw->mbox_rqst_pool);
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return -EIO;
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}
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return 0;
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}
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@ -602,4 +602,13 @@ efct_get_wwnn(struct efct_hw *hw);
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uint64_t
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efct_get_wwpn(struct efct_hw *hw);
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int efct_hw_rx_allocate(struct efct_hw *hw);
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int efct_hw_rx_post(struct efct_hw *hw);
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void efct_hw_rx_free(struct efct_hw *hw);
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int
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efct_hw_command(struct efct_hw *hw, u8 *cmd, u32 opts, void *cb,
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void *arg);
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int
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efct_issue_mbox_rqst(void *base, void *cmd, void *cb, void *arg);
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#endif /* __EFCT_H__ */
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