Merge branches 'acpi-pm' and 'acpi-x86'

Merge additional ACPI quirks for x86 systems:

 - Drop a suspend-to-idle quirk for HP Elitebook G9 that is not needed
   any more after a firmware update (Mario Limonciello).

 - Add all Cezanne systems to the list for forcing StorageD3Enable,
   because they all need the same quirk (Mario Limonciello).

* acpi-pm:
  ACPI: x86: Drop quirk for HP Elitebook

* acpi-x86:
  ACPI: x86: utils: Add Cezanne to the list for forcing StorageD3Enable
This commit is contained in:
Rafael J. Wysocki 2023-03-03 18:45:53 +01:00
commit 57b76324c2
2 changed files with 13 additions and 48 deletions

View File

@ -384,29 +384,6 @@ static const struct acpi_device_id amd_hid_ids[] = {
{}
};
static int lps0_prefer_amd(const struct dmi_system_id *id)
{
pr_debug("Using AMD GUID w/ _REV 2.\n");
rev_id = 2;
return 0;
}
static const struct dmi_system_id s2idle_dmi_table[] __initconst = {
{
/*
* AMD Rembrandt based HP EliteBook 835/845/865 G9
* Contains specialized AML in AMD/_REV 2 path to avoid
* triggering a bug in Qualcomm WLAN firmware. This may be
* removed in the future if that firmware is fixed.
*/
.callback = lps0_prefer_amd,
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "HP"),
DMI_MATCH(DMI_BOARD_NAME, "8990"),
},
},
{}
};
static int lps0_device_attach(struct acpi_device *adev,
const struct acpi_device_id *not_used)
{
@ -586,7 +563,6 @@ static const struct platform_s2idle_ops acpi_s2idle_ops_lps0 = {
void __init acpi_s2idle_setup(void)
{
dmi_check_system(s2idle_dmi_table);
acpi_scan_add_handler(&lps0_handler);
s2idle_set_ops(&acpi_s2idle_ops_lps0);
}

View File

@ -200,39 +200,28 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
* a hardcoded allowlist for D3 support, which was used for these platforms.
*
* This allows quirking on Linux in a similar fashion.
*
* Cezanne systems shouldn't *normally* need this as the BIOS includes
* StorageD3Enable. But for two reasons we have added it.
* 1) The BIOS on a number of Dell systems have ambiguity
* between the same value used for _ADR on ACPI nodes GPP1.DEV0 and GPP1.NVME.
* GPP1.NVME is needed to get StorageD3Enable node set properly.
* https://bugzilla.kernel.org/show_bug.cgi?id=216440
* https://bugzilla.kernel.org/show_bug.cgi?id=216773
* https://bugzilla.kernel.org/show_bug.cgi?id=217003
* 2) On at least one HP system StorageD3Enable is missing on the second NVME
disk in the system.
*/
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
{}
};
static const struct dmi_system_id force_storage_d3_dmi[] = {
{
/*
* _ADR is ambiguous between GPP1.DEV0 and GPP1.NVME
* but .NVME is needed to get StorageD3Enable node
* https://bugzilla.kernel.org/show_bug.cgi?id=216440
*/
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 14 7425 2-in-1"),
}
},
{
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 16 5625"),
}
},
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
{}
};
bool force_storage_d3(void)
{
const struct dmi_system_id *dmi_id = dmi_first_match(force_storage_d3_dmi);
return dmi_id || x86_match_cpu(storage_d3_cpu_ids);
return x86_match_cpu(storage_d3_cpu_ids);
}
/*