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parisc architecture fixes and updates for kernel v6.12-rc1:
- Convert parisc to the generic clockevents framework - Fix syscall and mm for 64-bit userspace - Fix stack start when ADDR_NO_RANDOMIZE personality is set - Fix mmap(MAP_STACK) to map upward growing expandable memory on parisc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZumrLQAKCRD3ErUQojoP X0ifAQCLI1G7+watiiVDXf3DRR3o6G73CUO5NlEkkY94T0/megEA1Pn92Prqt4fd QikvJ/jKXPgcDHplqVWqm4EYG2ByIQA= =ytxZ -----END PGP SIGNATURE----- Merge tag 'parisc-for-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc architecture updates from Helge Deller: - On parisc we now use the generic clockevent framework for timekeeping - Although there is no 64-bit glibc/userspace for parisc yet, for testing purposes one can run statically linked 64-bit binaries. This patchset contains two patches which fix 64-bit userspace which has been broken since kernel 4.19 - Fix the userspace stack position and size when the ADDR_NO_RANDOMIZE personality is enabled - On other architectures mmap(MAP_GROWSDOWN | MAP_STACK) creates a downward-growing stack. On parisc mmap(MAP_STACK) is now sufficient to create an upward-growing stack * tag 'parisc-for-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Allow mmap(MAP_STACK) memory to automatically expand upwards parisc: Use PRIV_USER instead of hardcoded value parisc: Fix itlb miss handler for 64-bit programs parisc: Fix 64-bit userspace syscall path parisc: Fix stack start for ADDR_NO_RANDOMIZE personality parisc: Convert to generic clockevents parisc: pdc_stable: Constify struct kobj_type
This commit is contained in:
Linus Torvalds
commit
54450af662
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@ -72,7 +72,7 @@ config PARISC
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select GENERIC_SCHED_CLOCK
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select GENERIC_IRQ_MIGRATION if SMP
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select HAVE_UNSTABLE_SCHED_CLOCK if SMP
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select LEGACY_TIMER_TICK
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select GENERIC_CLOCKEVENTS
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select CPU_NO_EFFICIENT_FFS
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select THREAD_INFO_IN_TASK
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select NEED_DMA_MAP_STATE
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@ -11,4 +11,18 @@ static inline bool arch_memory_deny_write_exec_supported(void)
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}
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#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported
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static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)
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{
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/*
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* The stack on parisc grows upwards, so if userspace requests memory
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* for a stack, mark it with VM_GROWSUP so that the stack expansion in
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* the fault handler will work.
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*/
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if (flags & MAP_STACK)
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return VM_GROWSUP;
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return 0;
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}
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#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)
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#endif /* __ASM_MMAN_H__ */
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@ -298,7 +298,7 @@ extern unsigned int toc_handler_csum;
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extern void do_cpu_irq_mask(struct pt_regs *);
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extern irqreturn_t timer_interrupt(int, void *);
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extern irqreturn_t ipi_interrupt(int, void *);
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extern void start_cpu_itimer(void);
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extern void parisc_clockevent_init(void);
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extern void handle_interruption(int, struct pt_regs *);
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/* called from assembly code: */
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@ -1051,8 +1051,7 @@ ENTRY_CFI(intr_save) /* for os_hpmc */
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STREG %r16, PT_ISR(%r29)
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STREG %r17, PT_IOR(%r29)
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#if 0 && defined(CONFIG_64BIT)
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/* Revisit when we have 64-bit code above 4Gb */
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#if defined(CONFIG_64BIT)
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b,n intr_save2
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skip_save_ior:
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@ -1060,8 +1059,7 @@ skip_save_ior:
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* need to adjust iasq/iaoq here in the same way we adjusted isr/ior
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* above.
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*/
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extrd,u,* %r8,PSW_W_BIT,1,%r1
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cmpib,COND(=),n 1,%r1,intr_save2
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bb,COND(>=),n %r8,PSW_W_BIT,intr_save2
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LDREG PT_IASQ0(%r29), %r16
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LDREG PT_IAOQ0(%r29), %r17
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/* adjust iasq/iaoq */
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@ -297,7 +297,7 @@ smp_cpu_init(int cpunum)
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enter_lazy_tlb(&init_mm, current);
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init_IRQ(); /* make sure no IRQs are enabled or pending */
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start_cpu_itimer();
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parisc_clockevent_init();
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}
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@ -243,10 +243,10 @@ linux_gateway_entry:
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#ifdef CONFIG_64BIT
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ldil L%sys_call_table, %r1
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or,= %r2,%r2,%r2
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addil L%(sys_call_table64-sys_call_table), %r1
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or,ev %r2,%r2,%r2
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ldil L%sys_call_table64, %r1
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ldo R%sys_call_table(%r1), %r19
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or,= %r2,%r2,%r2
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or,ev %r2,%r2,%r2
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ldo R%sys_call_table64(%r1), %r19
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#else
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load32 sys_call_table, %r19
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@ -379,10 +379,10 @@ tracesys_next:
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extrd,u %r19,63,1,%r2 /* W hidden in bottom bit */
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ldil L%sys_call_table, %r1
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or,= %r2,%r2,%r2
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addil L%(sys_call_table64-sys_call_table), %r1
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or,ev %r2,%r2,%r2
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ldil L%sys_call_table64, %r1
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ldo R%sys_call_table(%r1), %r19
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or,= %r2,%r2,%r2
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or,ev %r2,%r2,%r2
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ldo R%sys_call_table64(%r1), %r19
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#else
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load32 sys_call_table, %r19
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@ -1327,6 +1327,8 @@ ENTRY(sys_call_table)
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END(sys_call_table)
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#ifdef CONFIG_64BIT
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#undef __SYSCALL_WITH_COMPAT
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#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)
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.align 8
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ENTRY(sys_call_table64)
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#include <asm/syscall_table_64.h> /* 64-bit syscalls */
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@ -1,126 +1,105 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/parisc/kernel/time.c
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* Common time service routines for parisc machines.
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* based on arch/loongarch/kernel/time.c
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Modifications for ARM (C) 1994, 1995, 1996,1997 Russell King
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* Copyright (C) 1999 SuSE GmbH, (Philipp Rumpf, prumpf@tux.org)
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*
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* 1994-07-02 Alan Modra
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* fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
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* 1998-12-20 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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* Copyright (C) 2024 Helge Deller <deller@gmx.de>
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/rtc.h>
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#include <linux/sched.h>
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#include <linux/sched/clock.h>
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#include <linux/sched_clock.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/clockchips.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/profile.h>
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#include <linux/clocksource.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/sched_clock.h>
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#include <linux/spinlock.h>
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#include <linux/rtc.h>
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#include <linux/platform_device.h>
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#include <linux/ftrace.h>
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#include <asm/processor.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/page.h>
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#include <asm/param.h>
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#include <asm/pdc.h>
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#include <asm/led.h>
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static u64 cr16_clock_freq;
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static unsigned long clocktick;
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#include <linux/timex.h>
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int time_keeper_id; /* CPU used for timekeeping */
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int time_keeper_id __read_mostly; /* CPU used for timekeeping. */
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static DEFINE_PER_CPU(struct clock_event_device, parisc_clockevent_device);
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static unsigned long clocktick __ro_after_init; /* timer cycles per tick */
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/*
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* We keep time on PA-RISC Linux by using the Interval Timer which is
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* a pair of registers; one is read-only and one is write-only; both
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* accessed through CR16. The read-only register is 32 or 64 bits wide,
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* and increments by 1 every CPU clock tick. The architecture only
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* guarantees us a rate between 0.5 and 2, but all implementations use a
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* rate of 1. The write-only register is 32-bits wide. When the lowest
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* 32 bits of the read-only register compare equal to the write-only
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* register, it raises a maskable external interrupt. Each processor has
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* an Interval Timer of its own and they are not synchronised.
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*
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* We want to generate an interrupt every 1/HZ seconds. So we program
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* CR16 to interrupt every @clocktick cycles. The it_value in cpu_data
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* is programmed with the intended time of the next tick. We can be
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* held off for an arbitrarily long period of time by interrupts being
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* disabled, so we may miss one or more ticks.
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*/
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irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
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static void parisc_event_handler(struct clock_event_device *dev)
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{
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unsigned long now;
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unsigned long next_tick;
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unsigned long ticks_elapsed = 0;
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unsigned int cpu = smp_processor_id();
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struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
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}
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/* gcc can optimize for "read-only" case with a local clocktick */
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unsigned long cpt = clocktick;
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static int parisc_timer_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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unsigned long new_cr16;
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/* Initialize next_tick to the old expected tick time. */
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next_tick = cpuinfo->it_value;
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new_cr16 = mfctl(16) + delta;
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mtctl(new_cr16, 16);
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/* Calculate how many ticks have elapsed. */
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now = mfctl(16);
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do {
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++ticks_elapsed;
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next_tick += cpt;
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} while (next_tick - now > cpt);
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return 0;
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}
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/* Store (in CR16 cycles) up to when we are accounting right now. */
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cpuinfo->it_value = next_tick;
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irqreturn_t timer_interrupt(int irq, void *data)
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{
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struct clock_event_device *cd;
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int cpu = smp_processor_id();
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/* Go do system house keeping. */
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if (IS_ENABLED(CONFIG_SMP) && (cpu != time_keeper_id))
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ticks_elapsed = 0;
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legacy_timer_tick(ticks_elapsed);
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cd = &per_cpu(parisc_clockevent_device, cpu);
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/* Skip clockticks on purpose if we know we would miss those.
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* The new CR16 must be "later" than current CR16 otherwise
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* itimer would not fire until CR16 wrapped - e.g 4 seconds
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* later on a 1Ghz processor. We'll account for the missed
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* ticks on the next timer interrupt.
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* We want IT to fire modulo clocktick even if we miss/skip some.
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* But those interrupts don't in fact get delivered that regularly.
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*
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* "next_tick - now" will always give the difference regardless
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* if one or the other wrapped. If "now" is "bigger" we'll end up
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* with a very large unsigned number.
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*/
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now = mfctl(16);
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while (next_tick - now > cpt)
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next_tick += cpt;
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if (clockevent_state_periodic(cd))
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parisc_timer_next_event(clocktick, cd);
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/* Program the IT when to deliver the next interrupt.
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* Only bottom 32-bits of next_tick are writable in CR16!
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* Timer interrupt will be delivered at least a few hundred cycles
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* after the IT fires, so if we are too close (<= 8000 cycles) to the
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* next cycle, simply skip it.
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*/
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if (next_tick - now <= 8000)
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next_tick += cpt;
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mtctl(next_tick, 16);
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if (clockevent_state_periodic(cd) || clockevent_state_oneshot(cd))
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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static int parisc_set_state_oneshot(struct clock_event_device *evt)
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{
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parisc_timer_next_event(clocktick, evt);
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unsigned long profile_pc(struct pt_regs *regs)
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return 0;
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}
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static int parisc_set_state_periodic(struct clock_event_device *evt)
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{
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parisc_timer_next_event(clocktick, evt);
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return 0;
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}
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static int parisc_set_state_shutdown(struct clock_event_device *evt)
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{
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return 0;
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}
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void parisc_clockevent_init(void)
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{
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unsigned int cpu = smp_processor_id();
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unsigned long min_delta = 0x600; /* XXX */
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unsigned long max_delta = (1UL << (BITS_PER_LONG - 1));
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struct clock_event_device *cd;
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cd = &per_cpu(parisc_clockevent_device, cpu);
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cd->name = "cr16_clockevent";
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cd->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_PERCPU;
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cd->irq = TIMER_IRQ;
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cd->rating = 320;
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cd->cpumask = cpumask_of(cpu);
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cd->set_state_oneshot = parisc_set_state_oneshot;
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cd->set_state_oneshot_stopped = parisc_set_state_shutdown;
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cd->set_state_periodic = parisc_set_state_periodic;
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cd->set_state_shutdown = parisc_set_state_shutdown;
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cd->set_next_event = parisc_timer_next_event;
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cd->event_handler = parisc_event_handler;
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clockevents_config_and_register(cd, cr16_clock_freq, min_delta, max_delta);
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}
|
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|
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unsigned long notrace profile_pc(struct pt_regs *regs)
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{
|
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unsigned long pc = instruction_pointer(regs);
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|
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|
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@ -136,32 +115,6 @@ unsigned long profile_pc(struct pt_regs *regs)
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}
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EXPORT_SYMBOL(profile_pc);
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|
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|
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/* clock source code */
|
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|
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static u64 notrace read_cr16(struct clocksource *cs)
|
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{
|
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return get_cycles();
|
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}
|
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|
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static struct clocksource clocksource_cr16 = {
|
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.name = "cr16",
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.rating = 300,
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.read = read_cr16,
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.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
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};
|
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|
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void start_cpu_itimer(void)
|
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{
|
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unsigned int cpu = smp_processor_id();
|
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unsigned long next_tick = mfctl(16) + clocktick;
|
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|
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mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
|
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|
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per_cpu(cpu_data, cpu).it_value = next_tick;
|
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}
|
||||
|
||||
#if IS_ENABLED(CONFIG_RTC_DRV_GENERIC)
|
||||
static int rtc_generic_get_time(struct device *dev, struct rtc_time *tm)
|
||||
{
|
||||
|
|
@ -224,12 +177,27 @@ void read_persistent_clock64(struct timespec64 *ts)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
static u64 notrace read_cr16_sched_clock(void)
|
||||
{
|
||||
return get_cycles();
|
||||
}
|
||||
|
||||
static u64 notrace read_cr16(struct clocksource *cs)
|
||||
{
|
||||
return get_cycles();
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_cr16 = {
|
||||
.name = "cr16",
|
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.rating = 300,
|
||||
.read = read_cr16,
|
||||
.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
|
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.flags = CLOCK_SOURCE_IS_CONTINUOUS |
|
||||
CLOCK_SOURCE_VALID_FOR_HRES |
|
||||
CLOCK_SOURCE_MUST_VERIFY |
|
||||
CLOCK_SOURCE_VERIFY_PERCPU,
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* timer interrupt and sched_clock() initialization
|
||||
|
|
@ -237,33 +205,14 @@ static u64 notrace read_cr16_sched_clock(void)
|
|||
|
||||
void __init time_init(void)
|
||||
{
|
||||
unsigned long cr16_hz;
|
||||
|
||||
clocktick = (100 * PAGE0->mem_10msec) / HZ;
|
||||
start_cpu_itimer(); /* get CPU 0 started */
|
||||
|
||||
cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
|
||||
cr16_clock_freq = 100 * PAGE0->mem_10msec; /* Hz */
|
||||
clocktick = cr16_clock_freq / HZ;
|
||||
|
||||
/* register as sched_clock source */
|
||||
sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
|
||||
}
|
||||
sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_clock_freq);
|
||||
|
||||
static int __init init_cr16_clocksource(void)
|
||||
{
|
||||
/*
|
||||
* The cr16 interval timers are not synchronized across CPUs.
|
||||
*/
|
||||
if (num_online_cpus() > 1 && !running_on_qemu) {
|
||||
clocksource_cr16.name = "cr16_unstable";
|
||||
clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
|
||||
clocksource_cr16.rating = 0;
|
||||
}
|
||||
parisc_clockevent_init();
|
||||
|
||||
/* register at clocksource framework */
|
||||
clocksource_register_hz(&clocksource_cr16,
|
||||
100 * PAGE0->mem_10msec);
|
||||
|
||||
return 0;
|
||||
clocksource_register_hz(&clocksource_cr16, cr16_clock_freq);
|
||||
}
|
||||
|
||||
device_initcall(init_cr16_clocksource);
|
||||
|
|
|
|||
|
|
@ -504,7 +504,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
|
|||
if (((unsigned long)regs->iaoq[0] & 3) &&
|
||||
((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
|
||||
/* Kill the user process later */
|
||||
regs->iaoq[0] = 0 | 3;
|
||||
regs->iaoq[0] = 0 | PRIV_USER;
|
||||
regs->iaoq[1] = regs->iaoq[0] + 4;
|
||||
regs->iasq[0] = regs->iasq[1] = regs->sr[7];
|
||||
regs->gr[0] &= ~PSW_B;
|
||||
|
|
|
|||
|
|
@ -483,7 +483,7 @@ static struct attribute *paths_subsys_attrs[] = {
|
|||
ATTRIBUTE_GROUPS(paths_subsys);
|
||||
|
||||
/* Specific kobject type for our PDC paths */
|
||||
static struct kobj_type ktype_pdcspath = {
|
||||
static const struct kobj_type ktype_pdcspath = {
|
||||
.sysfs_ops = &pdcspath_attr_ops,
|
||||
.default_groups = paths_subsys_groups,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -811,7 +811,8 @@ int setup_arg_pages(struct linux_binprm *bprm,
|
|||
stack_base = calc_max_stack_size(stack_base);
|
||||
|
||||
/* Add space for stack randomization. */
|
||||
stack_base += (STACK_RND_MASK << PAGE_SHIFT);
|
||||
if (current->flags & PF_RANDOMIZE)
|
||||
stack_base += (STACK_RND_MASK << PAGE_SHIFT);
|
||||
|
||||
/* Make sure we didn't let the argument array grow too large. */
|
||||
if (vma->vm_end - vma->vm_start > stack_base)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user