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Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm

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Pull ARM fixes from Russell King:
 "A few ARM fixes:

   - Robin Murphy noticed that the non-secure privileged entry was
     relying on undefined behaviour, which needed to be fixed.

   - Vladimir Murzin noticed that prov-v7 fails to build for MMUless
     configurations because a required header file wasn't included.

   - A bunch of fixes for StrongARM regressions found while testing
     4.8-rc on such platforms"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: sa1100: clear reset status prior to reboot
  ARM: 8600/1: Enforce some NS-SVC initialisation
  ARM: 8599/1: mm: pull asm/memory.h explicitly
  ARM: sa1100: register clocks early
  ARM: sa1100: fix 3.6864MHz clock
This commit is contained in:
Linus Torvalds 2016-09-09 08:32:10 -07:00
commit 53d5f1dcd1
5 changed files with 23 additions and 2 deletions
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13
arch/arm/kernel/hyp-stub.S
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@ -142,6 +142,19 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE
and r7, #0x1f @ Preserve HPMN
mcr p15, 4, r7, c1, c1, 1 @ HDCR
@ Make sure NS-SVC is initialised appropriately
mrc p15, 0, r7, c1, c0, 0 @ SCTLR
orr r7, #(1 << 5) @ CP15 barriers enabled
bic r7, #(3 << 7) @ Clear SED/ITD for v8 (RES0 for v7)
bic r7, #(3 << 19) @ WXN and UWXN disabled
mcr p15, 0, r7, c1, c0, 0 @ SCTLR
mrc p15, 0, r7, c0, c0, 0 @ MIDR
mcr p15, 4, r7, c0, c0, 0 @ VPIDR
mrc p15, 0, r7, c0, c0, 5 @ MPIDR
mcr p15, 4, r7, c0, c0, 5 @ VMPIDR
#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
@ make CNTP_* and CNTPCT accessible from PL1
mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1

5
arch/arm/mach-sa1100/clock.c
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@ -125,6 +125,8 @@ static unsigned long clk_36864_get_rate(struct clk *clk)
}
static struct clkops clk_36864_ops = {
.enable = clk_cpu_enable,
.disable = clk_cpu_disable,
.get_rate = clk_36864_get_rate,
};
@ -140,9 +142,8 @@ static struct clk_lookup sa11xx_clkregs[] = {
CLKDEV_INIT(NULL, "OSTIMER0", &clk_36864),
};
static int __init sa11xx_clk_init(void)
int __init sa11xx_clk_init(void)
{
clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
return 0;
}
core_initcall(sa11xx_clk_init);

4
arch/arm/mach-sa1100/generic.c
View File

@ -34,6 +34,7 @@
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/reset.h>
#include "generic.h"
#include <clocksource/pxa.h>
@ -95,6 +96,8 @@ static void sa1100_power_off(void)
void sa11x0_restart(enum reboot_mode mode, const char *cmd)
{
clear_reset_status(RESET_STATUS_ALL);
if (mode == REBOOT_SOFT) {
/* Jump into ROM at address 0 */
soft_restart(0);
@ -388,6 +391,7 @@ void __init sa1100_init_irq(void)
sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
sa1100_init_gpio();
sa11xx_clk_init();
}
/*

2
arch/arm/mach-sa1100/generic.h
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@ -44,3 +44,5 @@ int sa11x0_pm_init(void);
#else
static inline int sa11x0_pm_init(void) { return 0; }
#endif
int sa11xx_clk_init(void);

1
arch/arm/mm/proc-v7.S
View File

@ -16,6 +16,7 @@
#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/memory.h>
#include "proc-macros.S"