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staging: comedi: ni_tiocmd: use a local var for the 'counter_index'
Use a local variable for the 'counter->counter_index' to help shorten the long lines and ugly line breaks. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
Greg Kroah-Hartman
parent
e6b1624aae
commit
5382bfb978
@ -57,6 +57,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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short read_not_write)
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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unsigned cidx = counter->counter_index;
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unsigned input_select_bits = 0;
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if (enable) {
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@ -65,8 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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else
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input_select_bits |= Gi_Write_Acknowledges_Irq;
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}
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ni_tio_set_bits(counter,
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NITIO_INPUT_SEL_REG(counter->counter_index),
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ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx),
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Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
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input_select_bits);
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switch (counter_dev->variant) {
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@ -83,9 +83,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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}
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if (read_not_write == 0)
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gi_dma_config_bits |= Gi_DMA_Write_Bit;
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ni_tio_set_bits(counter,
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NITIO_DMA_CFG_REG(counter->
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counter_index),
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ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx),
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Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
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Gi_DMA_Write_Bit, gi_dma_config_bits);
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}
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@ -122,6 +120,7 @@ static int ni_tio_input_inttrig(struct comedi_device *dev,
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static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
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{
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struct ni_gpct_device *counter_dev = counter->counter_dev;
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unsigned cidx = counter->counter_index;
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struct comedi_cmd *cmd = &async->cmd;
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int retval = 0;
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@ -140,8 +139,7 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
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BUG();
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break;
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}
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ni_tio_set_bits(counter, NITIO_CMD_REG(counter->counter_index),
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Gi_Save_Trace_Bit, 0);
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ni_tio_set_bits(counter, NITIO_CMD_REG(cidx), Gi_Save_Trace_Bit, 0);
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ni_tio_configure_dma(counter, 1, 1);
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switch (cmd->start_src) {
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case TRIG_NOW:
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@ -185,6 +183,7 @@ static int ni_tio_output_cmd(struct ni_gpct *counter,
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static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
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{
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struct comedi_cmd *cmd = &async->cmd;
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unsigned cidx = counter->counter_index;
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int set_gate_source = 0;
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unsigned gate_source;
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int retval = 0;
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@ -199,13 +198,9 @@ static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
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if (set_gate_source)
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retval = ni_tio_set_gate_src(counter, 0, gate_source);
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if (cmd->flags & TRIG_WAKE_EOS) {
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ni_tio_set_bits(counter,
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NITIO_INT_ENA_REG(counter->
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counter_index),
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Gi_Gate_Interrupt_Enable_Bit(counter->
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counter_index),
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Gi_Gate_Interrupt_Enable_Bit(counter->
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counter_index));
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ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx),
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Gi_Gate_Interrupt_Enable_Bit(cidx),
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Gi_Gate_Interrupt_Enable_Bit(cidx));
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}
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return retval;
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}
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@ -301,6 +296,7 @@ EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
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int ni_tio_cancel(struct ni_gpct *counter)
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{
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unsigned cidx = counter->counter_index;
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unsigned long flags;
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ni_tio_arm(counter, 0, 0);
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@ -310,10 +306,8 @@ int ni_tio_cancel(struct ni_gpct *counter)
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spin_unlock_irqrestore(&counter->lock, flags);
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ni_tio_configure_dma(counter, 0, 0);
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ni_tio_set_bits(counter,
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NITIO_INT_ENA_REG(counter->counter_index),
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Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),
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0x0);
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ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx),
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Gi_Gate_Interrupt_Enable_Bit(cidx), 0x0);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ni_tio_cancel);
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@ -353,14 +347,11 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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int *tc_error, int *perm_stale_data,
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int *stale_data)
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{
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unsigned cidx = counter->counter_index;
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const unsigned short gxx_status = read_register(counter,
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NITIO_SHARED_STATUS_REG
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(counter->
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counter_index));
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NITIO_SHARED_STATUS_REG(cidx));
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const unsigned short gi_status = read_register(counter,
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NITIO_STATUS_REG
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(counter->
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counter_index));
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NITIO_STATUS_REG(cidx));
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unsigned ack = 0;
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if (gate_error)
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@ -372,8 +363,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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if (stale_data)
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*stale_data = 0;
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if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) {
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ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index);
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if (gxx_status & Gi_Gate_Error_Bit(cidx)) {
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ack |= Gi_Gate_Error_Confirm_Bit(cidx);
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if (gate_error) {
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/*660x don't support automatic acknowledgement
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of gate interrupt via dma read/write
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@ -384,8 +375,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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}
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}
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}
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if (gxx_status & Gi_TC_Error_Bit(counter->counter_index)) {
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ack |= Gi_TC_Error_Confirm_Bit(counter->counter_index);
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if (gxx_status & Gi_TC_Error_Bit(cidx)) {
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ack |= Gi_TC_Error_Confirm_Bit(cidx);
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if (tc_error)
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*tc_error = 1;
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}
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@ -396,21 +387,15 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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ack |= Gi_Gate_Interrupt_Ack_Bit;
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}
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if (ack)
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write_register(counter, ack,
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NITIO_INT_ACK_REG
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(counter->counter_index));
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if (ni_tio_get_soft_copy
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(counter,
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NITIO_MODE_REG(counter->counter_index)) &
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write_register(counter, ack, NITIO_INT_ACK_REG(cidx));
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if (ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)) &
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Gi_Loading_On_Gate_Bit) {
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if (gxx_status & Gi_Stale_Data_Bit(counter->counter_index)) {
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if (gxx_status & Gi_Stale_Data_Bit(cidx)) {
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if (stale_data)
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*stale_data = 1;
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}
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if (read_register(counter,
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NITIO_STATUS2_REG
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(counter->counter_index)) &
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Gi_Permanent_Stale_Bit(counter->counter_index)) {
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if (read_register(counter, NITIO_STATUS2_REG(cidx)) &
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Gi_Permanent_Stale_Bit(cidx)) {
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dev_info(counter->counter_dev->dev->class_dev,
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"%s: Gi_Permanent_Stale_Data detected.\n",
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__func__);
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@ -424,6 +409,7 @@ EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
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void ni_tio_handle_interrupt(struct ni_gpct *counter,
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struct comedi_subdevice *s)
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{
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unsigned cidx = counter->counter_index;
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unsigned gpct_mite_status;
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unsigned long flags;
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int gate_error;
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@ -442,9 +428,8 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
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switch (counter->counter_dev->variant) {
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case ni_gpct_variant_m_series:
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case ni_gpct_variant_660x:
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if (read_register(counter,
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NITIO_DMA_STATUS_REG
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(counter->counter_index)) & Gi_DRQ_Error_Bit) {
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if (read_register(counter, NITIO_DMA_STATUS_REG(cidx)) &
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Gi_DRQ_Error_Bit) {
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dev_notice(counter->counter_dev->dev->class_dev,
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"%s: Gi_DRQ_Error detected.\n", __func__);
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s->async->events |= COMEDI_CB_OVERFLOW;
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