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KVM: powerpc: Fix mtsrin in book3s_64 mmu
We were shifting the Ks/Kp/N bits one bit too far on mtsrin. It took me some time to figure that out, so I also put in some debugging and a comment explaining the conversion. This fixes current OpenBIOS boot on PPC64 KVM. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -390,6 +390,26 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
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{
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{
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u64 rb = 0, rs = 0;
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u64 rb = 0, rs = 0;
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/*
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* According to Book3 2.01 mtsrin is implemented as:
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*
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* The SLB entry specified by (RB)32:35 is loaded from register
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* RS, as follows.
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*
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* SLBE Bit Source SLB Field
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*
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* 0:31 0x0000_0000 ESID-0:31
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* 32:35 (RB)32:35 ESID-32:35
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* 36 0b1 V
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* 37:61 0x00_0000|| 0b0 VSID-0:24
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* 62:88 (RS)37:63 VSID-25:51
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* 89:91 (RS)33:35 Ks Kp N
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* 92 (RS)36 L ((RS)36 must be 0b0)
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* 93 0b0 C
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*/
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dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
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/* ESID = srnum */
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/* ESID = srnum */
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rb |= (srnum & 0xf) << 28;
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rb |= (srnum & 0xf) << 28;
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/* Set the valid bit */
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/* Set the valid bit */
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@ -400,7 +420,7 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
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/* VSID = VSID */
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/* VSID = VSID */
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rs |= (value & 0xfffffff) << 12;
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rs |= (value & 0xfffffff) << 12;
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/* flags = flags */
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/* flags = flags */
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rs |= ((value >> 27) & 0xf) << 9;
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rs |= ((value >> 28) & 0x7) << 9;
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kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
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kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
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}
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}
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