Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2021-11-18 13:13:16 -08:00
commit 50fc24944a
795 changed files with 38321 additions and 19932 deletions

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@ -512,3 +512,19 @@ Date: July 2021
Contact: "Daeho Jeong" <daehojeong@google.com>
Description: You can control the multiplier value of bdi device readahead window size
between 2 (default) and 256 for POSIX_FADV_SEQUENTIAL advise option.
What: /sys/fs/f2fs/<disk>/max_fragment_chunk
Date: August 2021
Contact: "Daeho Jeong" <daehojeong@google.com>
Description: With "mode=fragment:block" mount options, we can scatter block allocation.
f2fs will allocate 1..<max_fragment_chunk> blocks in a chunk and make a hole
in the length of 1..<max_fragment_hole> by turns. This value can be set
between 1..512 and the default value is 4.
What: /sys/fs/f2fs/<disk>/max_fragment_hole
Date: August 2021
Contact: "Daeho Jeong" <daehojeong@google.com>
Description: With "mode=fragment:block" mount options, we can scatter block allocation.
f2fs will allocate 1..<max_fragment_chunk> blocks in a chunk and make a hole
in the length of 1..<max_fragment_hole> by turns. This value can be set
between 1..512 and the default value is 4.

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@ -1099,7 +1099,7 @@ task_delayacct
===============
Enables/disables task delay accounting (see
:doc:`accounting/delay-accounting.rst`). Enabling this feature incurs
Documentation/accounting/delay-accounting.rst. Enabling this feature incurs
a small amount of overhead in the scheduler but is useful for debugging
and performance tuning. It is required by some tools such as iotop.

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@ -104,6 +104,8 @@ Discovery family
Not supported by the Linux kernel.
Homepage:
https://web.archive.org/web/20110924171043/http://www.marvell.com/embedded-processors/discovery-innovation/
Core:
Feroceon 88fr571-vd ARMv5 compatible
@ -120,6 +122,7 @@ EBU Armada family
- 88F6707
- 88F6W11
- Product infos: https://web.archive.org/web/20141002083258/http://www.marvell.com/embedded-processors/armada-370/
- Product Brief: https://web.archive.org/web/20121115063038/http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf
- Hardware Spec: https://web.archive.org/web/20140617183747/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-datasheet.pdf
- Functional Spec: https://web.archive.org/web/20140617183701/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-FunctionalSpec-datasheet.pdf
@ -127,9 +130,29 @@ EBU Armada family
Core:
Sheeva ARMv7 compatible PJ4B
Armada XP Flavors:
- MV78230
- MV78260
- MV78460
NOTE:
not to be confused with the non-SMP 78xx0 SoCs
- Product infos: https://web.archive.org/web/20150101215721/http://www.marvell.com/embedded-processors/armada-xp/
- Product Brief: https://web.archive.org/web/20121021173528/http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
- Functional Spec: https://web.archive.org/web/20180829171131/http://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf
- Hardware Specs:
- https://web.archive.org/web/20141127013651/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78230_OS.PDF
- https://web.archive.org/web/20141222000224/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78260_OS.PDF
- https://web.archive.org/web/20141222000230/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78460_OS.PDF
Core:
Sheeva ARMv7 compatible Dual-core or Quad-core PJ4B-MP
Armada 375 Flavors:
- 88F6720
- Product infos: https://web.archive.org/web/20140108032402/http://www.marvell.com/embedded-processors/armada-375/
- Product Brief: https://web.archive.org/web/20131216023516/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA_375_SoC-01_product_brief.pdf
Core:
@ -162,29 +185,6 @@ EBU Armada family
Core:
ARM Cortex-A9
Armada XP Flavors:
- MV78230
- MV78260
- MV78460
NOTE:
not to be confused with the non-SMP 78xx0 SoCs
Product Brief:
https://web.archive.org/web/20121021173528/http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf
Functional Spec:
https://web.archive.org/web/20180829171131/http://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf
- Hardware Specs:
- https://web.archive.org/web/20141127013651/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78230_OS.PDF
- https://web.archive.org/web/20141222000224/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78260_OS.PDF
- https://web.archive.org/web/20141222000230/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78460_OS.PDF
Core:
Sheeva ARMv7 compatible Dual-core or Quad-core PJ4B-MP
Linux kernel mach directory:
arch/arm/mach-mvebu
Linux kernel plat directory:
@ -436,7 +436,7 @@ Berlin family (Multimedia Solutions)
- Flavors:
- 88DE3010, Armada 1000 (no Linux support)
- Core: Marvell PJ1 (ARMv5TE), Dual-core
- Product Brief: http://www.marvell.com.cn/digital-entertainment/assets/armada_1000_pb.pdf
- Product Brief: https://web.archive.org/web/20131103162620/http://www.marvell.com/digital-entertainment/assets/armada_1000_pb.pdf
- 88DE3005, Armada 1500 Mini
- Design name: BG2CD
- Core: ARM Cortex-A9, PL310 L2CC

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@ -15,7 +15,7 @@ that goes into great technical depth about the BPF Architecture.
libbpf
======
Documentation/bpf/libbpf/libbpf.rst is a userspace library for loading and interacting with bpf programs.
Documentation/bpf/libbpf/index.rst is a userspace library for loading and interacting with bpf programs.
BPF Type Format (BTF)
=====================

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST STi Platforms Device Tree Bindings
maintainers:
- Patrice Chotard <patrice.chotard@st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
properties:
$nodename:

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@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 ML-AHB interconnect bindings
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
description: |
These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects

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@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 Platforms System Controller bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
properties:
compatible:

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Platforms Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
properties:
$nodename:

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@ -104,7 +104,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
cgu: clock-controller@10000000 {
compatible = "ingenic,jz4770-cgu", "simple-mfd";
reg = <0x10000000 0x100>;

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@ -42,6 +42,9 @@ properties:
"#clock-cells":
const: 1
"#reset-cells":
const: 1
required:
- compatible
- reg
@ -57,4 +60,5 @@ examples:
reg = <0x10000000 0x1000>;
clocks = <&hfclk>, <&rtcclk>;
#clock-cells = <1>;
#reset-cells = <1>;
};

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@ -2,7 +2,7 @@ Binding for Silicon Labs Si5351a/b/c programmable i2c clock generator.
Reference
[1] Si5351A/B/C Data Sheet
https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351.pdf
https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
The Si5351a/b/c are programmable i2c clock generators with up to 8 output
clocks. Si5351a also has a reduced pin-count package (MSOP10) where only

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@ -23,6 +23,7 @@ properties:
- socionext,uniphier-ld11-clock
- socionext,uniphier-ld20-clock
- socionext,uniphier-pxs3-clock
- socionext,uniphier-nx1-clock
- description: Media I/O (MIO) clock, SD clock
enum:
- socionext,uniphier-ld4-mio-clock
@ -33,6 +34,7 @@ properties:
- socionext,uniphier-ld11-mio-clock
- socionext,uniphier-ld20-sd-clock
- socionext,uniphier-pxs3-sd-clock
- socionext,uniphier-nx1-sd-clock
- description: Peripheral clock
enum:
- socionext,uniphier-ld4-peri-clock
@ -43,6 +45,10 @@ properties:
- socionext,uniphier-ld11-peri-clock
- socionext,uniphier-ld20-peri-clock
- socionext,uniphier-pxs3-peri-clock
- socionext,uniphier-nx1-peri-clock
- description: SoC-glue clock
enum:
- socionext,uniphier-pro4-sg-clock
"#clock-cells":
const: 1

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Reset Clock Controller Binding
maintainers:
- Gabriel Fernandez <gabriel.fernandez@st.com>
- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
description: |
The RCC IP is both a reset and a clock controller.

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CRC bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CRYP bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 HASH bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare MIPI DSI host controller
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
This document defines device tree properties for the Synopsys DesignWare MIPI

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@ -1,54 +0,0 @@
Toshiba TC358767 eDP bridge bindings
Required properties:
- compatible: "toshiba,tc358767"
- reg: i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
- clock-names: should be "ref"
- clocks: OF device-tree clock specification for refclk input. The reference
clock rate must be 13 MHz, 19.2 MHz, 26 MHz, or 38.4 MHz.
Optional properties:
- shutdown-gpios: OF device-tree gpio specification for SD pin
(active high shutdown input)
- reset-gpios: OF device-tree gpio specification for RSTX pin
(active low system reset)
- toshiba,hpd-pin: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
- ports: the ports node can contain video interface port nodes to connect
to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
- port@0: DSI input port
- port@1: DPI input port
- port@2: eDP/DP output port
[1]: Documentation/devicetree/bindings/graph.txt
[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
Example:
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
port@2 {
reg = <2>;
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

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@ -0,0 +1,158 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba TC358767 eDP bridge bindings
maintainers:
- Andrey Gusakov <andrey.gusakov@cogentembedded.com>
description: The TC358767 is bridge device which converts DSI/DPI to eDP/DP
properties:
compatible:
const: toshiba,tc358767
reg:
enum:
- 0x68
- 0x0f
description: |
i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
clock-names:
const: "ref"
clocks:
maxItems: 1
description: |
OF device-tree clock specification for refclk input. The reference.
clock rate must be 13 MHz, 19.2 MHz, 26 MHz, or 38.4 MHz.
shutdown-gpios:
maxItems: 1
description: |
OF device-tree gpio specification for SD pin(active high shutdown input)
reset-gpios:
maxItems: 1
description: |
OF device-tree gpio specification for RSTX pin(active low system reset)
toshiba,hpd-pin:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0
- 1
description: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: |
DSI input port. The remote endpoint phandle should be a
reference to a valid DSI output endpoint node
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: |
DPI input port. The remote endpoint phandle should be a
reference to a valid DPI output endpoint node
port@2:
$ref: /schemas/graph.yaml#/properties/port
description: |
eDP/DP output port. The remote endpoint phandle should be a
reference to a valid eDP panel input endpoint node. This port is
optional, treated as DP panel if not defined
oneOf:
- required:
- port@0
- required:
- port@1
required:
- compatible
- reg
- clock-names
- clocks
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
/* DPI input and eDP output */
i2c {
#address-cells = <1>;
#size-cells = <0>;
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in_0: endpoint {
remote-endpoint = <&dpi_out>;
};
};
port@2 {
reg = <2>;
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
};
- |
/* DPI input and DP output */
i2c {
#address-cells = <1>;
#size-cells = <0>;
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in_1: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
};

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@ -45,7 +45,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
ipu@13080000 {
compatible = "ingenic,jz4770-ipu", "ingenic,jz4760-ipu";
reg = <0x13080000 0x800>;

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@ -88,7 +88,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
lcd-controller@13050000 {
compatible = "ingenic,jz4740-lcd";
reg = <0x13050000 0x1000>;
@ -107,7 +107,7 @@ examples:
};
- |
#include <dt-bindings/clock/jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
lcd-controller@13050000 {
compatible = "ingenic,jz4725b-lcd";
reg = <0x13050000 0x1000>;

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
The Orise Tech OTM8009A is a 3.97" 480x800 TFT LCD panel connected using

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD

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@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DSI host controller
maintainers:
- Philippe Cornu <philippe.cornu@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Philippe Cornu <philippe.cornu@foss.st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
description:
The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.

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@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 lcd-tft display controller
maintainers:
- Philippe Cornu <philippe.cornu@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Philippe Cornu <philippe.cornu@foss.st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
properties:
compatible:

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@ -68,7 +68,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
dma: dma-controller@13420000 {
compatible = "ingenic,jz4780-dma";
reg = <0x13420000 0x400>, <0x13421000 0x40>;

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@ -50,7 +50,7 @@ description: |
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-controller.yaml#"

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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-router.yaml#"

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@ -50,7 +50,7 @@ description: |
if no HW ack signal is used by the MDMA client
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-controller.yaml#"

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@ -1,49 +0,0 @@
Netlogic XLP Family GPIO
========================
This GPIO driver is used for following Netlogic XLP SoCs:
XLP832, XLP316, XLP208, XLP980, XLP532
This GPIO driver is also compatible with GPIO controller found on
Broadcom Vulcan ARM64.
Required properties:
-------------------
- compatible: Should be one of the following:
- "netlogic,xlp832-gpio": For Netlogic XLP832
- "netlogic,xlp316-gpio": For Netlogic XLP316
- "netlogic,xlp208-gpio": For Netlogic XLP208
- "netlogic,xlp980-gpio": For Netlogic XLP980
- "netlogic,xlp532-gpio": For Netlogic XLP532
- "brcm,vulcan-gpio": For Broadcom Vulcan ARM64
- reg: Physical base address and length of the controller's registers.
- #gpio-cells: Should be two. The first cell is the pin number and the second
cell is used to specify optional parameters (currently unused).
- gpio-controller: Marks the device node as a GPIO controller.
- nr-gpios: Number of GPIO pins supported by the controller.
- interrupt-cells: Should be two. The first cell is the GPIO Number. The
second cell is used to specify flags. The following subset of flags is
supported:
- trigger type:
1 = low to high edge triggered.
2 = high to low edge triggered.
4 = active high level-sensitive.
8 = active low level-sensitive.
- interrupts: Interrupt number for this device.
- interrupt-controller: Identifies the node as an interrupt controller.
Example:
gpio: xlp_gpio@34000 {
compatible = "netlogic,xlp316-gpio";
reg = <0 0x34100 0x1000
0 0x35100 0x1000>;
#gpio-cells = <2>;
gpio-controller;
nr-gpios = <57>;
#interrupt-cells = <2>;
interrupt-parent = <&pic>;
interrupts = <39>;
interrupt-controller;
};

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@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Hardware Spinlock bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabien Dessenne <fabien.dessenne@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
properties:
"#hwlock-cells":

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@ -57,7 +57,9 @@ properties:
const: ipg
clock-frequency:
enum: [ 100000, 400000 ]
minimum: 1
default: 100000
maximum: 400000
dmas:
items:

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@ -1,22 +0,0 @@
Device tree configuration for the I2C controller on the XLP9xx/5xx SoC
Required properties:
- compatible : should be "netlogic,xlp980-i2c"
- reg : bus address start and address range size of device
- interrupts : interrupt number
Optional properties:
- clock-frequency : frequency of bus clock in Hz
Defaults to 100 KHz when the property is not specified
Example:
i2c0: i2c@113100 {
compatible = "netlogic,xlp980-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x113100 0x100>;
clock-frequency = <400000>;
interrupts = <30>;
interrupt-parent = <&pic>;
};

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@ -60,7 +60,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c@10054000 {

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C controller embedded in STMicroelectronics STM32 I2C platform
maintainers:
- Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
- Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#

View File

@ -74,7 +74,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
#include <dt-bindings/iio/adc/ingenic,adc.h>
adc@10070000 {

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Device-Tree bindings for sigma delta modulator
maintainers:
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:

View File

@ -19,7 +19,7 @@ description: |
Each STM32 ADC block can have up to 3 ADC instances.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:

View File

@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DFSDM ADC device driver
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Olivier Moysan <olivier.moysan@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description: |
STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to

View File

@ -15,7 +15,7 @@ description: |
current.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:

View File

@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 External Interrupt Controller Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Ludovic Barre <ludovic.barre@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Ludovic Barre <ludovic.barre@foss.st.com>
properties:
compatible:

View File

@ -13,8 +13,8 @@ description:
channels (N) can be read from a dedicated register.
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:

View File

@ -30,7 +30,6 @@ properties:
power-domain-names:
minItems: 2
maxItems: 3
items:
- const: venus
- const: vcodec0

View File

@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CEC bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
properties:
compatible:

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
maintainers:
- Hugues Fruchet <hugues.fruchet@st.com>
- Hugues Fruchet <hugues.fruchet@foss.st.com>
properties:
compatible:

View File

@ -84,7 +84,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/gpio/gpio.h>
nemc: memory-controller@13410000 {
compatible = "ingenic,jz4780-nemc";

View File

@ -19,7 +19,7 @@ description: |
Select. The FMC2 performs only one access at a time to an external device.
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
properties:
compatible:

View File

@ -17,7 +17,7 @@ description: |
- simple counter from IN1 input signal.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:

View File

@ -17,8 +17,7 @@ description: |
programmable prescaler.
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:

View File

@ -12,7 +12,7 @@ description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C
through VDD) and resistive touchscreen controller.
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:

View File

@ -9,7 +9,7 @@ title: STMicroelectonics STPMIC1 Power Management IC bindings
description: STMicroelectronics STPMIC1 Power Management IC
maintainers:
- pascal Paillet <p.paillet@st.com>
- pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:

View File

@ -44,7 +44,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
cpus {
#address-cells = <1>;

View File

@ -61,7 +61,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
mmc0: mmc@13450000 {
compatible = "ingenic,jz4780-mmc";

View File

@ -55,7 +55,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
memory-controller@13410000 {
compatible = "ingenic,jz4780-nemc";
reg = <0x13410000 0x10000>;

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
properties:
compatible:

View File

@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
mac: ethernet@134b0000 {
compatible = "ingenic,x1000-mac";

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare MAC Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Giuseppe Cavallaro <peppe.cavallaro@st.com>
- Jose Abreu <joabreu@synopsys.com>

View File

@ -8,8 +8,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
description:
This file documents platform glue layer for stmmac.

View File

@ -33,7 +33,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
efuse@134100d0 {
compatible = "ingenic,jz4780-efuse";

View File

@ -13,7 +13,7 @@ description: |
internal vref (VREFIN_CAL), unique device ID...
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "nvmem.yaml#"

View File

@ -46,7 +46,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
otg_phy: usb-phy@3c {
compatible = "ingenic,jz4770-phy";
reg = <0x3c 0x10>;

View File

@ -24,7 +24,7 @@ description:
|_ UTMI switch_______| OTG controller
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:

View File

@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 GPIO and Pin Mux/Config controller
maintainers:
- Alexandre TORGUE <alexandre.torgue@st.com>
- Alexandre TORGUE <alexandre.torgue@foss.st.com>
description: |
STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 booster for ADC analog input switches bindings
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
description: |
Some STM32 devices embed a 3.3V booster supplied by Vdda, that can be used

View File

@ -12,7 +12,7 @@ description: |
components through the dedicated VREF+ pin.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "regulator.yaml#"

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32MP1 PWR voltage regulators
maintainers:
- Pascal Paillet <p.paillet@st.com>
- Pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:

View File

@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
vpu: video-decoder@132a0000 {
compatible = "ingenic,jz4770-vpu-rproc";

View File

@ -11,8 +11,8 @@ description:
boots firmwares on the ST32MP family chipset.
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:

View File

@ -32,7 +32,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1830-cgu.h>
#include <dt-bindings/clock/ingenic,x1830-cgu.h>
dtrng: trng@10072000 {
compatible = "ingenic,x1830-dtrng";

View File

@ -11,7 +11,7 @@ description: |
IP and is fully separated from other crypto functions.
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:

View File

@ -72,7 +72,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
rtc_dev: rtc@10003000 {
compatible = "ingenic,jz4740-rtc";
reg = <0x10003000 0x40>;

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Real Time Clock Bindings
maintainers:
- Gabriel Fernandez <gabriel.fernandez@st.com>
- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
properties:
compatible:

View File

@ -71,7 +71,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
#include <dt-bindings/gpio/gpio.h>
serial@10032000 {

View File

@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
maintainers:
- Erwan Le Ray <erwan.leray@st.com>
- Erwan Le Ray <erwan.leray@foss.st.com>
title: STMicroelectronics STM32 USART bindings

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: CS42L51 audio codec DT bindings
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
properties:
compatible:

View File

@ -71,7 +71,7 @@ required:
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
aic: audio-controller@10020000 {
compatible = "ingenic,jz4740-i2s";
reg = <0x10020000 0x38>;

View File

@ -48,7 +48,7 @@ required:
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
codec: audio-codec@10020080 {
compatible = "ingenic,jz4740-codec";
reg = <0x10020080 0x8>;

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 SPI/I2S Controller
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description:
The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Serial Audio Interface (SAI)
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description:
The SAI interface (Serial Audio Interface) offers a wide set of audio

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 S/PDIF receiver (SPDIFRX)
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description: |
The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with

View File

@ -55,7 +55,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
spi@10043000 {
compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";
reg = <0x10043000 0x1c>;

View File

@ -1,38 +0,0 @@
SPI Master controller for Netlogic XLP MIPS64 SOCs
==================================================
Currently this SPI controller driver is supported for the following
Netlogic XLP SoCs:
XLP832, XLP316, XLP208, XLP980, XLP532
Required properties:
- compatible : Should be "netlogic,xlp832-spi".
- #address-cells : Number of cells required to define a chip select address
on the SPI bus.
- #size-cells : Should be zero.
- reg : Should contain register location and length.
- clocks : Phandle of the spi clock
- interrupts : Interrupt number used by this controller.
SPI slave nodes must be children of the SPI master node and can contain
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.
Example:
spi: xlp_spi@3a100 {
compatible = "netlogic,xlp832-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x3a100 0x100>;
clocks = <&spi_clk>;
interrupts = <34>;
interrupt-parent = <&pic>;
spi_nor@1 {
compatible = "spansion,s25sl12801";
#address-cells = <1>;
#size-cells = <1>;
reg = <1>; /* Chip Select */
spi-max-frequency = <40000000>;
};
};

View File

@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Patrice Chotard <patrice.chotard@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
allOf:
- $ref: "spi-controller.yaml#"

View File

@ -13,8 +13,8 @@ description: |
from 4 to 32-bit data size.
maintainers:
- Erwan Leray <erwan.leray@st.com>
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Erwan Leray <erwan.leray@foss.st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "spi-controller.yaml#"

View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 digital thermal sensor (DTS) binding
maintainers:
- David Hernandez Sanchez <david.hernandezsanchez@st.com>
- Pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:

View File

@ -46,7 +46,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
ost: timer@12000000 {
compatible = "ingenic,x1000-ost";

View File

@ -237,7 +237,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
tcu: timer@10002000 {
compatible = "ingenic,jz4770-tcu", "ingenic,jz4760-tcu", "simple-mfd";

View File

@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
properties:
compatible:

View File

@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
usb_phy: usb-phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;

View File

@ -7,7 +7,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STUSB160x Type-C controller bindings
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:

View File

@ -40,14 +40,12 @@ properties:
clocks:
minItems: 1
maxItems: 2
items:
- description: High-frequency oscillator input, divided internally
- description: Low-frequency oscillator input, only found on some variants
clock-names:
minItems: 1
maxItems: 2
items:
- const: hosc
- const: losc

View File

@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Independent WatchDoG (IWDG) bindings
maintainers:
- Yannick Fertre <yannick.fertre@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
allOf:
- $ref: "watchdog.yaml#"

View File

@ -27,7 +27,7 @@ Sphinx Install
==============
The ReST markups currently used by the Documentation/ files are meant to be
built with ``Sphinx`` version 1.3 or higher.
built with ``Sphinx`` version 1.7 or higher.
There's a script that checks for the Sphinx requirements. Please see
:ref:`sphinx-pre-install` for further details.
@ -43,10 +43,6 @@ or ``virtualenv``, depending on how your distribution packaged Python 3.
.. note::
#) Sphinx versions below 1.5 don't work properly with Python's
docutils version 0.13.1 or higher. So, if you're willing to use
those versions, you should run ``pip install 'docutils==0.12'``.
#) It is recommended to use the RTD theme for html output. Depending
on the Sphinx version, it should be installed separately,
with ``pip install sphinx_rtd_theme``.
@ -55,13 +51,13 @@ or ``virtualenv``, depending on how your distribution packaged Python 3.
those expressions are written using LaTeX notation. It needs texlive
installed with amsfonts and amsmath in order to evaluate them.
In summary, if you want to install Sphinx version 1.7.9, you should do::
In summary, if you want to install Sphinx version 2.4.4, you should do::
$ virtualenv sphinx_1.7.9
$ . sphinx_1.7.9/bin/activate
(sphinx_1.7.9) $ pip install -r Documentation/sphinx/requirements.txt
$ virtualenv sphinx_2.4.4
$ . sphinx_2.4.4/bin/activate
(sphinx_2.4.4) $ pip install -r Documentation/sphinx/requirements.txt
After running ``. sphinx_1.7.9/bin/activate``, the prompt will change,
After running ``. sphinx_2.4.4/bin/activate``, the prompt will change,
in order to indicate that you're using the new environment. If you
open a new shell, you need to rerun this command to enter again at
the virtual environment before building the documentation.
@ -81,7 +77,7 @@ output.
PDF and LaTeX builds
--------------------
Such builds are currently supported only with Sphinx versions 1.4 and higher.
Such builds are currently supported only with Sphinx versions 2.4 and higher.
For PDF and LaTeX output, you'll also need ``XeLaTeX`` version 3.14159265.
@ -104,8 +100,8 @@ command line options for your distro::
You should run:
sudo dnf install -y texlive-luatex85
/usr/bin/virtualenv sphinx_1.7.9
. sphinx_1.7.9/bin/activate
/usr/bin/virtualenv sphinx_2.4.4
. sphinx_2.4.4/bin/activate
pip install -r Documentation/sphinx/requirements.txt
Can't build as 1 mandatory dependency is missing at ./scripts/sphinx-pre-install line 468.

View File

@ -35,7 +35,7 @@ This document describes only the kernel module and the interactions
required with any user-space program. Subsequent text refers to this
as the "automount daemon" or simply "the daemon".
"autofs" is a Linux kernel module with provides the "autofs"
"autofs" is a Linux kernel module which provides the "autofs"
filesystem type. Several "autofs" filesystems can be mounted and they
can each be managed separately, or all managed by the same daemon.

View File

@ -197,10 +197,29 @@ fault_type=%d Support configuring fault injection type, should be
FAULT_DISCARD 0x000002000
FAULT_WRITE_IO 0x000004000
FAULT_SLAB_ALLOC 0x000008000
FAULT_DQUOT_INIT 0x000010000
=================== ===========
mode=%s Control block allocation mode which supports "adaptive"
and "lfs". In "lfs" mode, there should be no random
writes towards main area.
"fragment:segment" and "fragment:block" are newly added here.
These are developer options for experiments to simulate filesystem
fragmentation/after-GC situation itself. The developers use these
modes to understand filesystem fragmentation/after-GC condition well,
and eventually get some insights to handle them better.
In "fragment:segment", f2fs allocates a new segment in ramdom
position. With this, we can simulate the after-GC condition.
In "fragment:block", we can scatter block allocation with
"max_fragment_chunk" and "max_fragment_hole" sysfs nodes.
We added some randomness to both chunk and hole size to make
it close to realistic IO pattern. So, in this mode, f2fs will allocate
1..<max_fragment_chunk> blocks in a chunk and make a hole in the
length of 1..<max_fragment_hole> by turns. With this, the newly
allocated blocks will be scattered throughout the whole partition.
Note that "fragment:block" implicitly enables "fragment:segment"
option for more randomness.
Please, use these options for your experiments and we strongly
recommend to re-format the filesystem after using these options.
io_bits=%u Set the bit size of write IO requests. It should be set
with "mode=lfs".
usrquota Enable plain user disk quota accounting.

View File

@ -54,7 +54,7 @@ mcelog 0.6 mcelog --version
iptables 1.4.2 iptables -V
openssl & libcrypto 1.0.0 openssl version
bc 1.06.95 bc --version
Sphinx\ [#f1]_ 1.3 sphinx-build --version
Sphinx\ [#f1]_ 1.7 sphinx-build --version
====================== =============== ========================================
.. [#f1] Sphinx is needed only to build the Kernel documentation

View File

@ -22,8 +22,8 @@ use it, it will make your life as a kernel developer and in general much
easier.
Some subsystems and maintainer trees have additional information about
their workflow and expectations, see :ref:`Documentation/process/maintainer
handbooks <maintainer_handbooks_main>`.
their workflow and expectations, see
:ref:`Documentation/process/maintainer-handbooks.rst <maintainer_handbooks_main>`.
Obtain a current source tree
----------------------------

View File

@ -15,7 +15,10 @@ For security module support, three SCTP specific hooks have been implemented::
security_sctp_assoc_request()
security_sctp_bind_connect()
security_sctp_sk_clone()
security_sctp_assoc_established()
Also the following security hook has been utilised::
security_inet_conn_established()
The usage of these hooks are described below with the SELinux implementation
described in the `SCTP SELinux Support`_ chapter.
@ -119,12 +122,11 @@ calls **sctp_peeloff**\(3).
@newsk - pointer to new sock structure.
security_sctp_assoc_established()
security_inet_conn_established()
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Called when a COOKIE ACK is received, and the peer secid will be
saved into ``@asoc->peer_secid`` for client::
Called when a COOKIE ACK is received::
@asoc - pointer to sctp association structure.
@sk - pointer to sock structure.
@skb - pointer to skbuff of the COOKIE ACK packet.
@ -132,7 +134,7 @@ Security Hooks used for Association Establishment
-------------------------------------------------
The following diagram shows the use of ``security_sctp_bind_connect()``,
``security_sctp_assoc_request()``, ``security_sctp_assoc_established()`` when
``security_sctp_assoc_request()``, ``security_inet_conn_established()`` when
establishing an association.
::
@ -170,7 +172,7 @@ establishing an association.
<------------------------------------------- COOKIE ACK
| |
sctp_sf_do_5_1E_ca |
Call security_sctp_assoc_established() |
Call security_inet_conn_established() |
to set the peer label. |
| |
| If SCTP_SOCKET_TCP or peeled off
@ -196,7 +198,7 @@ hooks with the SELinux specifics expanded below::
security_sctp_assoc_request()
security_sctp_bind_connect()
security_sctp_sk_clone()
security_sctp_assoc_established()
security_inet_conn_established()
security_sctp_assoc_request()
@ -269,12 +271,12 @@ sockets sid and peer sid to that contained in the ``@asoc sid`` and
@newsk - pointer to new sock structure.
security_sctp_assoc_established()
security_inet_conn_established()
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Called when a COOKIE ACK is received where it sets the connection's peer sid
to that in ``@skb``::
@asoc - pointer to sctp association structure.
@sk - pointer to sock structure.
@skb - pointer to skbuff of the COOKIE ACK packet.

View File

@ -2442,11 +2442,10 @@ Or this simple script!
#!/bin/bash
tracefs=`sed -ne 's/^tracefs \(.*\) tracefs.*/\1/p' /proc/mounts`
echo nop > $tracefs/tracing/current_tracer
echo 0 > $tracefs/tracing/tracing_on
echo $$ > $tracefs/tracing/set_ftrace_pid
echo function > $tracefs/tracing/current_tracer
echo 1 > $tracefs/tracing/tracing_on
echo 0 > $tracefs/tracing_on
echo $$ > $tracefs/set_ftrace_pid
echo function > $tracefs/current_tracer
echo 1 > $tracefs/tracing_on
exec "$@"

View File

@ -35,7 +35,7 @@ Installazione Sphinx
====================
I marcatori ReST utilizzati nei file in Documentation/ sono pensati per essere
processati da ``Sphinx`` nella versione 1.3 o superiore.
processati da ``Sphinx`` nella versione 1.7 o superiore.
Esiste uno script che verifica i requisiti Sphinx. Per ulteriori dettagli
consultate :ref:`it_sphinx-pre-install`.
@ -53,11 +53,6 @@ pacchettizzato dalla vostra distribuzione.
.. note::
#) Le versioni di Sphinx inferiori alla 1.5 non funzionano bene
con il pacchetto Python docutils versione 0.13.1 o superiore.
Se volete usare queste versioni, allora dovere eseguire
``pip install 'docutils==0.12'``.
#) Viene raccomandato l'uso del tema RTD per la documentazione in HTML.
A seconda della versione di Sphinx, potrebbe essere necessaria
l'installazione tramite il comando ``pip install sphinx_rtd_theme``.
@ -67,13 +62,13 @@ pacchettizzato dalla vostra distribuzione.
utilizzando LaTeX. Per una corretta interpretazione, è necessario aver
installato texlive con i pacchetti amdfonts e amsmath.
Riassumendo, se volete installare la versione 1.7.9 di Sphinx dovete eseguire::
Riassumendo, se volete installare la versione 2.4.4 di Sphinx dovete eseguire::
$ virtualenv sphinx_1.7.9
$ . sphinx_1.7.9/bin/activate
(sphinx_1.7.9) $ pip install -r Documentation/sphinx/requirements.txt
$ virtualenv sphinx_2.4.4
$ . sphinx_2.4.4/bin/activate
(sphinx_2.4.4) $ pip install -r Documentation/sphinx/requirements.txt
Dopo aver eseguito ``. sphinx_1.7.9/bin/activate``, il prompt cambierà per
Dopo aver eseguito ``. sphinx_2.4.4/bin/activate``, il prompt cambierà per
indicare che state usando il nuovo ambiente. Se aprite un nuova sessione,
prima di generare la documentazione, dovrete rieseguire questo comando per
rientrare nell'ambiente virtuale.
@ -94,7 +89,7 @@ Generazione in PDF e LaTeX
--------------------------
Al momento, la generazione di questi documenti è supportata solo dalle
versioni di Sphinx superiori alla 1.4.
versioni di Sphinx superiori alla 2.4.
Per la generazione di PDF e LaTeX, avrete bisogno anche del pacchetto
``XeLaTeX`` nella versione 3.14159265
@ -119,8 +114,8 @@ l'installazione::
You should run:
sudo dnf install -y texlive-luatex85
/usr/bin/virtualenv sphinx_1.7.9
. sphinx_1.7.9/bin/activate
/usr/bin/virtualenv sphinx_2.4.4
. sphinx_2.4.4/bin/activate
pip install -r Documentation/sphinx/requirements.txt
Can't build as 1 mandatory dependency is missing at ./scripts/sphinx-pre-install line 468.

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