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r8169: move common initializations to tp->hw_start

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The chip-specific init code includes quite some calls which are
identical for all chips. So move these calls to tp->hw_start().

In addition move rtl_set_rx_max_size() a little to make sure it's
defined before it's used. Unfortunately the diff generated by git
is a little bit hard to read.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Heiner Kallweit 2018-04-28 22:19:47 +02:00 committed by David S. Miller
parent 82d3ff6dd1
commit 4fd48c4ac0
1 changed files with 19 additions and 55 deletions
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74
drivers/net/ethernet/realtek/r8169.c
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@ -5301,10 +5301,10 @@ static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
(InterFrameGap << TxInterFrameGapShift));
}
static void rtl_hw_start(struct rtl8169_private *tp)
static void rtl_set_rx_max_size(struct rtl8169_private *tp)
{
tp->hw_start(tp);
rtl_irq_enable_all(tp);
/* Low hurts. Let's disable the filtering. */
RTL_W16(tp, RxMaxSize, R8169_RX_BUF_SIZE + 1);
}
static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp)
@ -5320,10 +5320,23 @@ static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp)
RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
}
static void rtl_set_rx_max_size(struct rtl8169_private *tp)
static void rtl_hw_start(struct rtl8169_private *tp)
{
/* Low hurts. Let's disable the filtering. */
RTL_W16(tp, RxMaxSize, R8169_RX_BUF_SIZE + 1);
RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
tp->hw_start(tp);
rtl_set_rx_max_size(tp);
rtl_set_rx_tx_desc_registers(tp);
rtl_set_rx_tx_config_registers(tp);
RTL_W8(tp, Cfg9346, Cfg9346_Lock);
/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
RTL_R8(tp, IntrMask);
RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
/* no early-rx interrupts */
RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000);
rtl_irq_enable_all(tp);
}
static void rtl8169_set_magic_reg(struct rtl8169_private *tp, unsigned mac_version)
@ -5408,12 +5421,8 @@ static void rtl_hw_start_8169(struct rtl8169_private *tp)
if (tp->mac_version == RTL_GIGA_MAC_VER_05)
pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
RTL_W8(tp, EarlyTxThres, NoEarlyTx);
rtl_set_rx_max_size(tp);
tp->cp_cmd |= PCIMulRW;
if (tp->mac_version == RTL_GIGA_MAC_VER_02 ||
@ -5433,20 +5442,7 @@ static void rtl_hw_start_8169(struct rtl8169_private *tp)
*/
RTL_W16(tp, IntrMitigate, 0x0000);
rtl_set_rx_tx_desc_registers(tp);
rtl_set_rx_tx_config_registers(tp);
RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
RTL_W8(tp, Cfg9346, Cfg9346_Lock);
/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
RTL_R8(tp, IntrMask);
RTL_W32(tp, RxMissed, 0);
/* no early-rx interrupts */
RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000);
}
static void rtl_csi_write(struct rtl8169_private *tp, int addr, int value)
@ -6227,12 +6223,8 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
static void rtl_hw_start_8168(struct rtl8169_private *tp)
{
RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
rtl_set_rx_max_size(tp);
tp->cp_cmd &= ~INTT_MASK;
tp->cp_cmd |= PktCntrDisable | INTT_1;
RTL_W16(tp, CPlusCmd, tp->cp_cmd);
@ -6245,12 +6237,6 @@ static void rtl_hw_start_8168(struct rtl8169_private *tp)
tp->event_slow &= ~RxOverflow;
}
rtl_set_rx_tx_desc_registers(tp);
rtl_set_rx_tx_config_registers(tp);
RTL_R8(tp, IntrMask);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_11:
rtl_hw_start_8168bb(tp);
@ -6354,12 +6340,6 @@ static void rtl_hw_start_8168(struct rtl8169_private *tp)
tp->dev->name, tp->mac_version);
break;
}
RTL_W8(tp, Cfg9346, Cfg9346_Lock);
RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000);
}
static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
@ -6495,19 +6475,11 @@ static void rtl_hw_start_8101(struct rtl8169_private *tp)
pcie_capability_set_word(tp->pci_dev, PCI_EXP_DEVCTL,
PCI_EXP_DEVCTL_NOSNOOP_EN);
RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
rtl_set_rx_max_size(tp);
tp->cp_cmd &= CPCMD_QUIRK_MASK;
RTL_W16(tp, CPlusCmd, tp->cp_cmd);
rtl_set_rx_tx_desc_registers(tp);
rtl_set_rx_tx_config_registers(tp);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_07:
rtl_hw_start_8102e_1(tp);
@ -6544,15 +6516,7 @@ static void rtl_hw_start_8101(struct rtl8169_private *tp)
break;
}
RTL_W8(tp, Cfg9346, Cfg9346_Lock);
RTL_W16(tp, IntrMitigate, 0x0000);
RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
RTL_R8(tp, IntrMask);
RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000);
}
static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)