From 4da74db0d9a6ffe053d3a3efa756906e0afc4cf7 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 18 Aug 2015 11:57:43 +0300 Subject: [PATCH] cxlflash: shift wrapping bug in afu_link_reset() "port_sel" is a u64 so the shifting should also be a 64 bit shift. Fixes: c21e0bbfc485 ('cxlflash: Base support for IBM CXL Flash Adapter') Signed-off-by: Dan Carpenter Reviewed-by: Johannes Thumshirn Acked-by: Matthew R. Ochs Signed-off-by: James Bottomley --- drivers/scsi/cxlflash/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/cxlflash/main.c b/drivers/scsi/cxlflash/main.c index fde2ba9342dc..caa1d09dafec 100644 --- a/drivers/scsi/cxlflash/main.c +++ b/drivers/scsi/cxlflash/main.c @@ -1248,7 +1248,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs) /* first switch the AFU to the other links, if any */ port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); - port_sel &= ~(1 << port); + port_sel &= ~(1ULL << port); writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); @@ -1265,7 +1265,7 @@ static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs) __func__, port); /* switch back to include this port */ - port_sel |= (1 << port); + port_sel |= (1ULL << port); writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);