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ASoC: fsl_sai: Allow setting the SAI MCLK direction
On mx6ul the General Purpose Register 1 (GPR1) contains the following bits for configuring the direction of the SAI MCLKs: SAI1_MCLK_DIR, SAI2_MCLK_DIR, SAI3_MCLK_DIR Introduce the "fsl,sai-mclk-direction-output" optional property to allow configuring the SAI_MCLK outputs. Tested on a imx6ul-evk board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -48,6 +48,11 @@ Required properties:
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receive data by following their own bit clocks and
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receive data by following their own bit clocks and
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frame sync clocks separately.
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frame sync clocks separately.
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Optional properties (for mx6ul):
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- fsl,sai-mclk-direction-output: This is a boolean property. If present,
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indicates that SAI will output the SAI MCLK clock.
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Note:
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Note:
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- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
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- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
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default synchronous mode (sync Rx with Tx) will be used, which means both
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default synchronous mode (sync Rx with Tx) will be used, which means both
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@ -447,5 +447,11 @@
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#define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18)
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#define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18)
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#define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17)
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#define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17)
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#define IMX6UL_GPR1_ENET_CLK_OUTPUT (0x3 << 17)
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#define IMX6UL_GPR1_ENET_CLK_OUTPUT (0x3 << 17)
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#define IMX6UL_GPR1_SAI1_MCLK_DIR (0x1 << 19)
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#define IMX6UL_GPR1_SAI2_MCLK_DIR (0x1 << 20)
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#define IMX6UL_GPR1_SAI3_MCLK_DIR (0x1 << 21)
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#define IMX6UL_GPR1_SAI_MCLK_MASK (0x7 << 19)
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#define MCLK_DIR(x) (x == 1 ? IMX6UL_GPR1_SAI1_MCLK_DIR : x == 2 ? \
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IMX6UL_GPR1_SAI2_MCLK_DIR : IMX6UL_GPR1_SAI3_MCLK_DIR)
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#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */
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#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */
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@ -21,6 +21,8 @@
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#include <sound/core.h>
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#include <sound/core.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include "fsl_sai.h"
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#include "fsl_sai.h"
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#include "imx-pcm.h"
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#include "imx-pcm.h"
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@ -786,10 +788,12 @@ static int fsl_sai_probe(struct platform_device *pdev)
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{
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{
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struct device_node *np = pdev->dev.of_node;
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struct device_node *np = pdev->dev.of_node;
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struct fsl_sai *sai;
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struct fsl_sai *sai;
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struct regmap *gpr;
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struct resource *res;
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struct resource *res;
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void __iomem *base;
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void __iomem *base;
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char tmp[8];
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char tmp[8];
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int irq, ret, i;
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int irq, ret, i;
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int index;
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sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
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sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
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if (!sai)
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if (!sai)
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@ -878,6 +882,22 @@ static int fsl_sai_probe(struct platform_device *pdev)
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fsl_sai_dai.symmetric_samplebits = 0;
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fsl_sai_dai.symmetric_samplebits = 0;
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}
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}
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if (of_find_property(np, "fsl,sai-mclk-direction-output", NULL) &&
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of_device_is_compatible(pdev->dev.of_node, "fsl,imx6ul-sai")) {
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
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if (IS_ERR(gpr)) {
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dev_err(&pdev->dev, "cannot find iomuxc registers\n");
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return PTR_ERR(gpr);
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}
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index = of_alias_get_id(np, "sai");
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if (index < 0)
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return index;
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regmap_update_bits(gpr, IOMUXC_GPR1, MCLK_DIR(index),
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MCLK_DIR(index));
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}
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sai->dma_params_rx.addr = res->start + FSL_SAI_RDR;
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sai->dma_params_rx.addr = res->start + FSL_SAI_RDR;
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sai->dma_params_tx.addr = res->start + FSL_SAI_TDR;
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sai->dma_params_tx.addr = res->start + FSL_SAI_TDR;
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sai->dma_params_rx.maxburst = FSL_SAI_MAXBURST_RX;
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sai->dma_params_rx.maxburst = FSL_SAI_MAXBURST_RX;
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