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serial: sccnxp: Adds a delay between sequential read/write cycles

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This patch adds a delay between sequential read/write cycles,
to ensure the required minimum inactive time (tRWD). A time value
from the datasheet has been added for each type of supported chips.
The “inline” compiler attribute has been removed from the
read/write functions, simply allow the compiler to control this.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alexander Shiyan 2018-12-20 09:19:29 +03:00 committed by Greg Kroah-Hartman
parent 663abb1a7a
commit 4ce193fdba
1 changed files with 27 additions and 5 deletions
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32
drivers/tty/serial/sccnxp.c
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@ -12,6 +12,7 @@
#endif #endif
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
@ -103,6 +104,8 @@ struct sccnxp_chip {
unsigned long freq_max; unsigned long freq_max;
unsigned int flags; unsigned int flags;
unsigned int fifosize; unsigned int fifosize;
/* Time between read/write cycles */
unsigned int trwd;
}; };
struct sccnxp_port { struct sccnxp_port {
@ -137,6 +140,7 @@ static const struct sccnxp_chip sc2681 = {
.freq_max = 4000000, .freq_max = 4000000,
.flags = SCCNXP_HAVE_IO, .flags = SCCNXP_HAVE_IO,
.fifosize = 3, .fifosize = 3,
.trwd = 200,
}; };
static const struct sccnxp_chip sc2691 = { static const struct sccnxp_chip sc2691 = {
@ -147,6 +151,7 @@ static const struct sccnxp_chip sc2691 = {
.freq_max = 4000000, .freq_max = 4000000,
.flags = 0, .flags = 0,
.fifosize = 3, .fifosize = 3,
.trwd = 150,
}; };
static const struct sccnxp_chip sc2692 = { static const struct sccnxp_chip sc2692 = {
@ -157,6 +162,7 @@ static const struct sccnxp_chip sc2692 = {
.freq_max = 4000000, .freq_max = 4000000,
.flags = SCCNXP_HAVE_IO, .flags = SCCNXP_HAVE_IO,
.fifosize = 3, .fifosize = 3,
.trwd = 30,
}; };
static const struct sccnxp_chip sc2891 = { static const struct sccnxp_chip sc2891 = {
@ -167,6 +173,7 @@ static const struct sccnxp_chip sc2891 = {
.freq_max = 8000000, .freq_max = 8000000,
.flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0, .flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
.fifosize = 16, .fifosize = 16,
.trwd = 27,
}; };
static const struct sccnxp_chip sc2892 = { static const struct sccnxp_chip sc2892 = {
@ -177,6 +184,7 @@ static const struct sccnxp_chip sc2892 = {
.freq_max = 8000000, .freq_max = 8000000,
.flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0, .flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
.fifosize = 16, .fifosize = 16,
.trwd = 17,
}; };
static const struct sccnxp_chip sc28202 = { static const struct sccnxp_chip sc28202 = {
@ -187,6 +195,7 @@ static const struct sccnxp_chip sc28202 = {
.freq_max = 50000000, .freq_max = 50000000,
.flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0, .flags = SCCNXP_HAVE_IO | SCCNXP_HAVE_MR0,
.fifosize = 256, .fifosize = 256,
.trwd = 10,
}; };
static const struct sccnxp_chip sc68681 = { static const struct sccnxp_chip sc68681 = {
@ -197,6 +206,7 @@ static const struct sccnxp_chip sc68681 = {
.freq_max = 4000000, .freq_max = 4000000,
.flags = SCCNXP_HAVE_IO, .flags = SCCNXP_HAVE_IO,
.fifosize = 3, .fifosize = 3,
.trwd = 200,
}; };
static const struct sccnxp_chip sc68692 = { static const struct sccnxp_chip sc68692 = {
@ -207,24 +217,36 @@ static const struct sccnxp_chip sc68692 = {
.freq_max = 4000000, .freq_max = 4000000,
.flags = SCCNXP_HAVE_IO, .flags = SCCNXP_HAVE_IO,
.fifosize = 3, .fifosize = 3,
.trwd = 200,
}; };
static inline u8 sccnxp_read(struct uart_port *port, u8 reg) static u8 sccnxp_read(struct uart_port *port, u8 reg)
{ {
return readb(port->membase + (reg << port->regshift)); struct sccnxp_port *s = dev_get_drvdata(port->dev);
u8 ret;
ret = readb(port->membase + (reg << port->regshift));
ndelay(s->chip->trwd);
return ret;
} }
static inline void sccnxp_write(struct uart_port *port, u8 reg, u8 v) static void sccnxp_write(struct uart_port *port, u8 reg, u8 v)
{ {
struct sccnxp_port *s = dev_get_drvdata(port->dev);
writeb(v, port->membase + (reg << port->regshift)); writeb(v, port->membase + (reg << port->regshift));
ndelay(s->chip->trwd);
} }
static inline u8 sccnxp_port_read(struct uart_port *port, u8 reg) static u8 sccnxp_port_read(struct uart_port *port, u8 reg)
{ {
return sccnxp_read(port, (port->line << 3) + reg); return sccnxp_read(port, (port->line << 3) + reg);
} }
static inline void sccnxp_port_write(struct uart_port *port, u8 reg, u8 v) static void sccnxp_port_write(struct uart_port *port, u8 reg, u8 v)
{ {
sccnxp_write(port, (port->line << 3) + reg, v); sccnxp_write(port, (port->line << 3) + reg, v);
} }