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drm/amd/display: Disable HBR audio for DP2 for certain ASICs

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[Description]
Due to a HW bug, HBR audio is not supported for
DP2 encoders for certain ASICs.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alvin Lee 2023-09-12 14:51:47 -04:00 committed by Alex Deucher
parent b68417613d
commit 4ccc8fdcca
9 changed files with 19 additions and 0 deletions
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1
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -466,6 +466,7 @@ struct dc_config {
bool use_assr_psp_message;
bool support_edp0_on_dp1;
unsigned int enable_fpo_flicker_detection;
bool disable_hbr_audio_dp2;
};
enum visual_confirm {

6
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
View File

@ -630,6 +630,11 @@ void dce_aud_az_enable(struct audio *audio)
audio->inst, value);
}
void dce_aud_az_disable_hbr_audio(struct audio *audio)
{
set_high_bit_rate_capable(audio, false);
}
void dce_aud_az_disable(struct audio *audio)
{
uint32_t value;
@ -1293,6 +1298,7 @@ static const struct audio_funcs funcs = {
.az_enable = dce_aud_az_enable,
.az_disable = dce_aud_az_disable,
.az_configure = dce_aud_az_configure,
.az_disable_hbr_audio = dce_aud_az_disable_hbr_audio,
.destroy = dce_aud_destroy,
};

1
drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
View File

@ -166,6 +166,7 @@ void dce_aud_hw_init(struct audio *audio);
void dce_aud_az_enable(struct audio *audio);
void dce_aud_az_disable(struct audio *audio);
void dce_aud_az_disable_hbr_audio(struct audio *audio);
void dce_aud_az_configure(struct audio *audio,
enum signal_type signal,

5
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
View File

@ -1597,6 +1597,11 @@ enum dc_status dce110_apply_single_controller_ctx_to_hw(
&audio_output.crtc_info,
&pipe_ctx->stream->audio_info,
&audio_output.dp_link_info);
if (dc->config.disable_hbr_audio_dp2)
if (pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio &&
dc->link_srv->dp_is_128b_132b_signal(pipe_ctx))
pipe_ctx->stream_res.audio->funcs->az_disable_hbr_audio(pipe_ctx->stream_res.audio);
}
/* make sure no pipes syncd to the pipe being enabled */

2
drivers/gpu/drm/amd/display/dc/inc/hw/audio.h
View File

@ -46,6 +46,8 @@ struct audio_funcs {
const struct audio_info *audio_info,
const struct audio_dp_link_info *dp_link_info);
void (*az_disable_hbr_audio)(struct audio *audio);
void (*wall_dto_setup)(struct audio *audio,
enum signal_type signal,
const struct audio_crtc_info *crtc_info,

1
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
View File

@ -1948,6 +1948,7 @@ static bool dcn31_resource_construct(
/* Use pipe context based otg sync logic */
dc->config.use_pipe_ctx_sync_logic = true;
dc->config.disable_hbr_audio_dp2 = true;
/* read VBIOS LTTPR caps */
{

1
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
View File

@ -2220,6 +2220,7 @@ static bool dcn32_resource_construct(
dc->config.dc_mode_clk_limit_support = true;
dc->config.enable_windowed_mpo_odm = true;
dc->config.disable_hbr_audio_dp2 = true;
/* read VBIOS LTTPR caps */
{
if (ctx->dc_bios->funcs->get_lttpr_caps) {

1
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
View File

@ -1780,6 +1780,7 @@ static bool dcn321_resource_construct(
dc->config.dc_mode_clk_limit_support = true;
dc->config.enable_windowed_mpo_odm = true;
dc->config.disable_hbr_audio_dp2 = true;
/* read VBIOS LTTPR caps */
{
if (ctx->dc_bios->funcs->get_lttpr_caps) {

1
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
View File

@ -1899,6 +1899,7 @@ static bool dcn35_resource_construct(
/* Use pipe context based otg sync logic */
dc->config.use_pipe_ctx_sync_logic = true;
dc->config.disable_hbr_audio_dp2 = true;
/* read VBIOS LTTPR caps */
{
if (ctx->dc_bios->funcs->get_lttpr_caps) {