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clk: ti: clk-7xx: Remove hardwired ABE clock configuration
The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.
Fixes: a74c52def9
("clk: ti: clk-7xx: Correct ABE DPLL configuration")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
This commit is contained in:
parent
9ffecb1028
commit
4b3061b391
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@ -18,7 +18,6 @@
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#include "clock.h"
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#include "clock.h"
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#define DRA7_DPLL_ABE_DEFFREQ 180633600
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#define DRA7_DPLL_GMAC_DEFFREQ 1000000000
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#define DRA7_DPLL_GMAC_DEFFREQ 1000000000
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#define DRA7_DPLL_USB_DEFFREQ 960000000
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#define DRA7_DPLL_USB_DEFFREQ 960000000
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@ -313,27 +312,12 @@ static struct ti_dt_clk dra7xx_clks[] = {
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int __init dra7xx_dt_clk_init(void)
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int __init dra7xx_dt_clk_init(void)
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{
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{
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int rc;
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int rc;
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struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
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struct clk *dpll_ck, *hdcp_ck;
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ti_dt_clocks_register(dra7xx_clks);
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ti_dt_clocks_register(dra7xx_clks);
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omap2_clk_disable_autoidle_all();
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omap2_clk_disable_autoidle_all();
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abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
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sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
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dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
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rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
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if (!rc)
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rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
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if (rc)
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pr_err("%s: failed to configure ABE DPLL!\n", __func__);
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dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
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rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
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if (rc)
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pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
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dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
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dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
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rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
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rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
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if (rc)
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if (rc)
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