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drm/amdgpu: Add empty HDP flush function to VCN v4.0.3
VCN 4.0.3 does not HDP flush with RRMT enabled. Instead, mmsch will do the HDP flush. This change is necessary for VCN v4.0.3, no need for backward compatibility Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Jane Jian <Jane.Jian@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1375,6 +1375,13 @@ static uint64_t vcn_v4_0_3_unified_ring_get_wptr(struct amdgpu_ring *ring)
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regUVD_RB_WPTR);
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}
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static void vcn_v4_0_3_ring_emit_hdp_flush(struct amdgpu_ring *ring)
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{
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/* VCN engine access for HDP flush doesn't work when RRMT is enabled.
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* This is a workaround to avoid any HDP flush through VCN ring.
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*/
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}
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/**
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* vcn_v4_0_3_unified_ring_set_wptr - set enc write pointer
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*
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@ -1415,6 +1422,7 @@ static const struct amdgpu_ring_funcs vcn_v4_0_3_unified_ring_vm_funcs = {
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.emit_ib = vcn_v2_0_enc_ring_emit_ib,
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.emit_fence = vcn_v2_0_enc_ring_emit_fence,
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.emit_vm_flush = vcn_v2_0_enc_ring_emit_vm_flush,
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.emit_hdp_flush = vcn_v4_0_3_ring_emit_hdp_flush,
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.test_ring = amdgpu_vcn_enc_ring_test_ring,
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.test_ib = amdgpu_vcn_unified_ring_test_ib,
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.insert_nop = amdgpu_ring_insert_nop,
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