mirror of
https://github.com/torvalds/linux.git
synced 2024-11-14 16:12:02 +00:00
Merge tag 'drm-intel-fixes-2021-05-20' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes
drm/i915 fixes for v5.13-rc3: - Pin the L-shape quirked object as unshrinkable to fix crashes - Disable HiZ Raw Stall Optimization on broken gen7 to fix glitches, gfx corruption - GVT: Move mdev attribute groups into kvmgt module to fix kconfig deps issue Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87a6opehx6.fsf@intel.com
This commit is contained in:
commit
4996c342b2
@ -102,7 +102,6 @@ config DRM_I915_GVT
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bool "Enable Intel GVT-g graphics virtualization host support"
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depends on DRM_I915
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depends on 64BIT
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depends on VFIO_MDEV=y || VFIO_MDEV=DRM_I915
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default n
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help
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Choose this option if you want to enable Intel GVT-g graphics
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@ -63,6 +63,8 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
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i915->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
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GEM_BUG_ON(i915_gem_object_has_tiling_quirk(obj));
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i915_gem_object_set_tiling_quirk(obj);
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GEM_BUG_ON(!list_empty(&obj->mm.link));
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atomic_inc(&obj->mm.shrink_pin);
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shrinkable = false;
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}
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@ -397,7 +397,10 @@ static void emit_batch(struct i915_vma * const vma,
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gen7_emit_pipeline_invalidate(&cmds);
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batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
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batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
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batch_add(&cmds, 0xffff0000);
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batch_add(&cmds, 0xffff0000 |
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((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ?
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HIZ_RAW_STALL_OPT_DISABLE :
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0));
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batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
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batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
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gen7_emit_pipeline_invalidate(&cmds);
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@ -46,118 +46,6 @@ static const char * const supported_hypervisors[] = {
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[INTEL_GVT_HYPERVISOR_KVM] = "KVM",
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};
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static struct intel_vgpu_type *
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intel_gvt_find_vgpu_type(struct intel_gvt *gvt, unsigned int type_group_id)
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{
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if (WARN_ON(type_group_id >= gvt->num_types))
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return NULL;
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return &gvt->types[type_group_id];
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}
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static ssize_t available_instances_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr,
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char *buf)
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{
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struct intel_vgpu_type *type;
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unsigned int num = 0;
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void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
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if (!type)
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num = 0;
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else
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num = type->avail_instance;
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return sprintf(buf, "%u\n", num);
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}
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static ssize_t device_api_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
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}
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static ssize_t description_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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struct intel_vgpu_type *type;
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void *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = intel_gvt_find_vgpu_type(gvt, mtype_get_type_group_id(mtype));
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if (!type)
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return 0;
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return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
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"fence: %d\nresolution: %s\n"
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"weight: %d\n",
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BYTES_TO_MB(type->low_gm_size),
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BYTES_TO_MB(type->high_gm_size),
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type->fence, vgpu_edid_str(type->resolution),
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type->weight);
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}
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static MDEV_TYPE_ATTR_RO(available_instances);
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static MDEV_TYPE_ATTR_RO(device_api);
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static MDEV_TYPE_ATTR_RO(description);
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static struct attribute *gvt_type_attrs[] = {
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&mdev_type_attr_available_instances.attr,
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&mdev_type_attr_device_api.attr,
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&mdev_type_attr_description.attr,
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NULL,
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};
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static struct attribute_group *gvt_vgpu_type_groups[] = {
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[0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
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};
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static bool intel_get_gvt_attrs(struct attribute_group ***intel_vgpu_type_groups)
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{
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*intel_vgpu_type_groups = gvt_vgpu_type_groups;
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return true;
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}
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static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i, j;
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struct intel_vgpu_type *type;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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type = &gvt->types[i];
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group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
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if (WARN_ON(!group))
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goto unwind;
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group->name = type->name;
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group->attrs = gvt_type_attrs;
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gvt_vgpu_type_groups[i] = group;
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}
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return 0;
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unwind:
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for (j = 0; j < i; j++) {
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group = gvt_vgpu_type_groups[j];
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kfree(group);
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}
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return -ENOMEM;
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}
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static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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group = gvt_vgpu_type_groups[i];
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gvt_vgpu_type_groups[i] = NULL;
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kfree(group);
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}
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}
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static const struct intel_gvt_ops intel_gvt_ops = {
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.emulate_cfg_read = intel_vgpu_emulate_cfg_read,
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.emulate_cfg_write = intel_vgpu_emulate_cfg_write,
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@ -169,8 +57,6 @@ static const struct intel_gvt_ops intel_gvt_ops = {
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.vgpu_reset = intel_gvt_reset_vgpu,
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.vgpu_activate = intel_gvt_activate_vgpu,
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.vgpu_deactivate = intel_gvt_deactivate_vgpu,
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.gvt_find_vgpu_type = intel_gvt_find_vgpu_type,
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.get_gvt_attrs = intel_get_gvt_attrs,
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.vgpu_query_plane = intel_vgpu_query_plane,
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.vgpu_get_dmabuf = intel_vgpu_get_dmabuf,
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.write_protect_handler = intel_vgpu_page_track_handler,
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@ -274,7 +160,6 @@ void intel_gvt_clean_device(struct drm_i915_private *i915)
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return;
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intel_gvt_destroy_idle_vgpu(gvt->idle_vgpu);
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intel_gvt_cleanup_vgpu_type_groups(gvt);
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intel_gvt_clean_vgpu_types(gvt);
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intel_gvt_debugfs_clean(gvt);
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@ -363,12 +248,6 @@ int intel_gvt_init_device(struct drm_i915_private *i915)
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if (ret)
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goto out_clean_thread;
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ret = intel_gvt_init_vgpu_type_groups(gvt);
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if (ret) {
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gvt_err("failed to init vgpu type groups: %d\n", ret);
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goto out_clean_types;
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}
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vgpu = intel_gvt_create_idle_vgpu(gvt);
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if (IS_ERR(vgpu)) {
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ret = PTR_ERR(vgpu);
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@ -454,7 +333,8 @@ EXPORT_SYMBOL_GPL(intel_gvt_register_hypervisor);
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void
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intel_gvt_unregister_hypervisor(void)
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{
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intel_gvt_hypervisor_host_exit(intel_gvt_host.dev);
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void *gvt = (void *)kdev_to_i915(intel_gvt_host.dev)->gvt;
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intel_gvt_hypervisor_host_exit(intel_gvt_host.dev, gvt);
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module_put(THIS_MODULE);
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}
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EXPORT_SYMBOL_GPL(intel_gvt_unregister_hypervisor);
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@ -574,9 +574,6 @@ struct intel_gvt_ops {
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void (*vgpu_reset)(struct intel_vgpu *);
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void (*vgpu_activate)(struct intel_vgpu *);
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void (*vgpu_deactivate)(struct intel_vgpu *);
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struct intel_vgpu_type *(*gvt_find_vgpu_type)(
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struct intel_gvt *gvt, unsigned int type_group_id);
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bool (*get_gvt_attrs)(struct attribute_group ***intel_vgpu_type_groups);
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int (*vgpu_query_plane)(struct intel_vgpu *vgpu, void *);
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int (*vgpu_get_dmabuf)(struct intel_vgpu *vgpu, unsigned int);
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int (*write_protect_handler)(struct intel_vgpu *, u64, void *,
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@ -49,7 +49,7 @@ enum hypervisor_type {
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struct intel_gvt_mpt {
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enum hypervisor_type type;
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int (*host_init)(struct device *dev, void *gvt, const void *ops);
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void (*host_exit)(struct device *dev);
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void (*host_exit)(struct device *dev, void *gvt);
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int (*attach_vgpu)(void *vgpu, unsigned long *handle);
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void (*detach_vgpu)(void *vgpu);
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int (*inject_msi)(unsigned long handle, u32 addr, u16 data);
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@ -144,6 +144,104 @@ static inline bool handle_valid(unsigned long handle)
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return !!(handle & ~0xff);
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}
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static ssize_t available_instances_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr,
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char *buf)
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{
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struct intel_vgpu_type *type;
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unsigned int num = 0;
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struct intel_gvt *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = &gvt->types[mtype_get_type_group_id(mtype)];
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if (!type)
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num = 0;
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else
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num = type->avail_instance;
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return sprintf(buf, "%u\n", num);
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}
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static ssize_t device_api_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
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}
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static ssize_t description_show(struct mdev_type *mtype,
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struct mdev_type_attribute *attr, char *buf)
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{
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struct intel_vgpu_type *type;
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struct intel_gvt *gvt = kdev_to_i915(mtype_get_parent_dev(mtype))->gvt;
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type = &gvt->types[mtype_get_type_group_id(mtype)];
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if (!type)
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return 0;
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return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
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"fence: %d\nresolution: %s\n"
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"weight: %d\n",
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BYTES_TO_MB(type->low_gm_size),
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BYTES_TO_MB(type->high_gm_size),
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type->fence, vgpu_edid_str(type->resolution),
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type->weight);
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}
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static MDEV_TYPE_ATTR_RO(available_instances);
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static MDEV_TYPE_ATTR_RO(device_api);
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static MDEV_TYPE_ATTR_RO(description);
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static struct attribute *gvt_type_attrs[] = {
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&mdev_type_attr_available_instances.attr,
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&mdev_type_attr_device_api.attr,
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&mdev_type_attr_description.attr,
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NULL,
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};
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static struct attribute_group *gvt_vgpu_type_groups[] = {
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[0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
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};
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static int intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i, j;
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struct intel_vgpu_type *type;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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type = &gvt->types[i];
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group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
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if (!group)
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goto unwind;
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group->name = type->name;
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group->attrs = gvt_type_attrs;
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gvt_vgpu_type_groups[i] = group;
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}
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return 0;
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unwind:
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for (j = 0; j < i; j++) {
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group = gvt_vgpu_type_groups[j];
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kfree(group);
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}
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return -ENOMEM;
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}
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static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)
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{
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int i;
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struct attribute_group *group;
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for (i = 0; i < gvt->num_types; i++) {
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group = gvt_vgpu_type_groups[i];
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gvt_vgpu_type_groups[i] = NULL;
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kfree(group);
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}
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}
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static int kvmgt_guest_init(struct mdev_device *mdev);
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static void intel_vgpu_release_work(struct work_struct *work);
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static bool kvmgt_guest_exit(struct kvmgt_guest_info *info);
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@ -694,14 +792,13 @@ static int intel_vgpu_create(struct mdev_device *mdev)
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struct intel_vgpu *vgpu = NULL;
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struct intel_vgpu_type *type;
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struct device *pdev;
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void *gvt;
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struct intel_gvt *gvt;
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int ret;
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pdev = mdev_parent_dev(mdev);
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gvt = kdev_to_i915(pdev)->gvt;
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type = intel_gvt_ops->gvt_find_vgpu_type(gvt,
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mdev_get_type_group_id(mdev));
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type = &gvt->types[mdev_get_type_group_id(mdev)];
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if (!type) {
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ret = -EINVAL;
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goto out;
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@ -1667,19 +1764,26 @@ static struct mdev_parent_ops intel_vgpu_ops = {
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static int kvmgt_host_init(struct device *dev, void *gvt, const void *ops)
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{
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struct attribute_group **kvm_vgpu_type_groups;
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int ret;
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ret = intel_gvt_init_vgpu_type_groups((struct intel_gvt *)gvt);
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if (ret)
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return ret;
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intel_gvt_ops = ops;
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if (!intel_gvt_ops->get_gvt_attrs(&kvm_vgpu_type_groups))
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return -EFAULT;
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intel_vgpu_ops.supported_type_groups = kvm_vgpu_type_groups;
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intel_vgpu_ops.supported_type_groups = gvt_vgpu_type_groups;
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return mdev_register_device(dev, &intel_vgpu_ops);
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ret = mdev_register_device(dev, &intel_vgpu_ops);
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if (ret)
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intel_gvt_cleanup_vgpu_type_groups((struct intel_gvt *)gvt);
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return ret;
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}
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static void kvmgt_host_exit(struct device *dev)
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static void kvmgt_host_exit(struct device *dev, void *gvt)
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{
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mdev_unregister_device(dev);
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intel_gvt_cleanup_vgpu_type_groups((struct intel_gvt *)gvt);
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}
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static int kvmgt_page_track_add(unsigned long handle, u64 gfn)
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|
@ -63,13 +63,13 @@ static inline int intel_gvt_hypervisor_host_init(struct device *dev,
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/**
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* intel_gvt_hypervisor_host_exit - exit GVT-g host side
|
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*/
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static inline void intel_gvt_hypervisor_host_exit(struct device *dev)
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static inline void intel_gvt_hypervisor_host_exit(struct device *dev, void *gvt)
|
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{
|
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/* optional to provide */
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if (!intel_gvt_host.mpt->host_exit)
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return;
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intel_gvt_host.mpt->host_exit(dev);
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intel_gvt_host.mpt->host_exit(dev, gvt);
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}
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|
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/**
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|
@ -999,12 +999,11 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
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obj->mm.madv = args->madv;
|
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|
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if (i915_gem_object_has_pages(obj)) {
|
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struct list_head *list;
|
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unsigned long flags;
|
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|
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if (i915_gem_object_is_shrinkable(obj)) {
|
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unsigned long flags;
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|
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spin_lock_irqsave(&i915->mm.obj_lock, flags);
|
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spin_lock_irqsave(&i915->mm.obj_lock, flags);
|
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if (!list_empty(&obj->mm.link)) {
|
||||
struct list_head *list;
|
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|
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if (obj->mm.madv != I915_MADV_WILLNEED)
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list = &i915->mm.purge_list;
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@ -1012,8 +1011,8 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
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list = &i915->mm.shrink_list;
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list_move_tail(&obj->mm.link, list);
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|
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spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
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}
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spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
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||||
}
|
||||
|
||||
/* if the object is no longer attached, discard its backing storage */
|
||||
|
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