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kselftest/arm64: Add SME2 coverage to syscall-abi
Verify that ZT0 is preserved over syscalls when it is present and PSTATE.ZA is set. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-19-f2fa0aef982f@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -23,6 +23,9 @@
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.arch_extension sve
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#define ID_AA64SMFR0_EL1_SMEver_SHIFT 56
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#define ID_AA64SMFR0_EL1_SMEver_WIDTH 4
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/*
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* LDR (vector to ZA array):
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* LDR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
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@ -45,6 +48,26 @@
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| ((\offset) & 7)
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.endm
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/*
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* LDR (ZT0)
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*
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* LDR ZT0, nx
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*/
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.macro _ldr_zt nx
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.inst 0xe11f8000 \
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| (((\nx) & 0x1f) << 5)
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.endm
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/*
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* STR (ZT0)
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*
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* STR ZT0, nx
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*/
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.macro _str_zt nx
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.inst 0xe13f8000 \
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| (((\nx) & 0x1f) << 5)
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.endm
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.globl do_syscall
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do_syscall:
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// Store callee saved registers x19-x29 (80 bytes) plus x0 and x1
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@ -64,7 +87,7 @@ do_syscall:
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msr S3_3_C4_C2_2, x2
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1:
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// Load ZA if it's enabled - uses x12 as scratch due to SME LDR
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// Load ZA and ZT0 if enabled - uses x12 as scratch due to SME LDR
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tbz x2, #SVCR_ZA_SHIFT, 1f
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mov w12, #0
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ldr x2, =za_in
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@ -73,6 +96,15 @@ do_syscall:
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add x12, x12, #1
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cmp x1, x12
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bne 2b
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// ZT0
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mrs x2, S3_0_C0_C4_5 // ID_AA64SMFR0_EL1
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ubfx x2, x2, #ID_AA64SMFR0_EL1_SMEver_SHIFT, \
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#ID_AA64SMFR0_EL1_SMEver_WIDTH
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cbz x2, 1f
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adrp x2, zt_in
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add x2, x2, :lo12:zt_in
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_ldr_zt 2
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1:
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// Load GPRs x8-x28, and save our SP/FP for later comparison
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@ -235,6 +267,15 @@ do_syscall:
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add x12, x12, #1
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cmp x1, x12
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bne 2b
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// ZT0
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mrs x2, S3_0_C0_C4_5 // ID_AA64SMFR0_EL1
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ubfx x2, x2, #ID_AA64SMFR0_EL1_SMEver_SHIFT, \
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#ID_AA64SMFR0_EL1_SMEver_WIDTH
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cbz x2, 1f
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adrp x2, zt_out
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add x2, x2, :lo12:zt_out
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_str_zt 2
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1:
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// Save the SVE state if we have some
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@ -311,6 +311,35 @@ static int check_za(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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return errors;
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}
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uint8_t zt_in[ZT_SIG_REG_BYTES] __attribute__((aligned(16)));
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uint8_t zt_out[ZT_SIG_REG_BYTES] __attribute__((aligned(16)));
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static void setup_zt(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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fill_random(zt_in, sizeof(zt_in));
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memset(zt_out, 0, sizeof(zt_out));
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}
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static int check_zt(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr)
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{
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int errors = 0;
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if (!(getauxval(AT_HWCAP2) & HWCAP2_SME2))
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return 0;
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if (!(svcr & SVCR_ZA_MASK))
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return 0;
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if (memcmp(zt_in, zt_out, sizeof(zt_in)) != 0) {
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ksft_print_msg("SME VL %d ZT does not match\n", sme_vl);
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errors++;
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}
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return errors;
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}
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typedef void (*setup_fn)(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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uint64_t svcr);
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typedef int (*check_fn)(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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@ -334,6 +363,7 @@ static struct {
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{ setup_ffr, check_ffr },
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{ setup_svcr, check_svcr },
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{ setup_za, check_za },
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{ setup_zt, check_zt },
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};
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static bool do_test(struct syscall_cfg *cfg, int sve_vl, int sme_vl,
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@ -474,6 +504,7 @@ int main(void)
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{
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int i;
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int tests = 1; /* FPSIMD */
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int sme_ver;
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srandom(getpid());
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@ -482,10 +513,15 @@ int main(void)
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tests += (sve_count_vls() * sme_count_vls()) * 3;
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ksft_set_plan(ARRAY_SIZE(syscalls) * tests);
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if (getauxval(AT_HWCAP2) & HWCAP2_SME2)
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sme_ver = 2;
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else
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sme_ver = 1;
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if (getauxval(AT_HWCAP2) & HWCAP2_SME_FA64)
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ksft_print_msg("SME with FA64\n");
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ksft_print_msg("SME%d with FA64\n", sme_ver);
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else if (getauxval(AT_HWCAP2) & HWCAP2_SME)
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ksft_print_msg("SME without FA64\n");
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ksft_print_msg("SME%d without FA64\n", sme_ver);
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for (i = 0; i < ARRAY_SIZE(syscalls); i++)
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test_one_syscall(&syscalls[i]);
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